基于XilinxFPGA的OFDM通信系统基带设计_基于xilinxfpgaOFDM通信系统基带设计资源-CSDN文库

共227个文件

v：33个

html：18个

veo：18个

OFDM

FPGA

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基于Xilinx FPGA的OFDM通信系统基带设计（227个子文件）

fft_test.asy 2KB

dint_ram.asy 910B

bram2i.asy 910B

bram1I.asy 910B

bram1r.asy 910B

bram2r.asy 910B

dint_ram2.asy 907B

dataromi.asy 819B

ramr.asy 819B

dataromr.asy 819B

rami.asy 819B

counter21.asy 558B

counter_data.asy 552B

counter_30.asy 550B

counter_80.asy 550B

main_counter.asy 451B

rcount_1.asy 451B

count24.asy 424B

fft_test.edn 2.5MB

bram2r.edn 28KB

bram2i.edn 28KB

bram1i.edn 28KB

bram1r.edn 28KB

rcount_1.edn 26KB

dataromi.edn 23KB

dataromr.edn 23KB

ramr.edn 23KB

rami.edn 23KB

counter_80.edn 22KB

dint_ram.edn 20KB

main_counter.edn 19KB

counter_data.edn 18KB

counter_30.edn 18KB

count24.edn 17KB

counter21.edn 15KB

dint_ram2.edn 13KB

DATA_pilot_insertion_summary.html 2KB

DATA_Pilot_Insert_summary.html 2KB

DATA_conv_encoder_summary.html 2KB

data_interleaver_summary.html 2KB

DATA_Conv_encode_summary.html 2KB

clock_generator_summary.html 2KB

clk_generator_summary.html 2KB

short_generator_summary.html 2KB

DATA_16QAM_mapper_summary.html 2KB

long_generator_summary.html 2KB

DATA_16QAM_MAP_summary.html 2KB

DATA_scramble_summary.html 2KB

transmit_MCU_summary.html 2KB

TX_MCU_summary.html 2KB

CP_adder_summary.html 2KB

FFT_Pro_new_summary.html 2KB

FFT_Pro_summary.html 2KB

IFFT_summary.html 2KB

IFFT.ise 345KB

transmit_MCU.ise 306KB

data_interleaver.ise 288KB

CP_ADDER.ise 286KB

short_training.ise 272KB

clock_generator.ise 255KB

DATA_CONV_encode.ise 254KB

DATA_Pilot_Insert.ise 253KB

DATA_16AM_MAP.ise 251KB

long_training.ise 243KB

DATA_Sramble.ise 216KB

IFFT.ise_ISE_Backup 345KB

transmit_MCU.ise_ISE_Backup 306KB

data_interleaver.ise_ISE_Backup 288KB

CP_ADDER.ise_ISE_Backup 285KB

short_training.ise_ISE_Backup 272KB

clock_generator.ise_ISE_Backup 255KB

DATA_CONV_encode.ise_ISE_Backup 254KB

DATA_Pilot_Insert.ise_ISE_Backup 252KB

DATA_16AM_MAP.ise_ISE_Backup 250KB

long_training.ise_ISE_Backup 243KB

DATA_Sramble.ise_ISE_Backup 215KB

dint_ram2.mif 96B

fft_test_fft21_flow_control_b_1.ngc 28KB

Sampling_Frequency_Synchronization.rar 438KB

CFO_Correction.rar 403KB

Frame_Detection.rar 276KB

Channel_Equalizer.rar 221KB

Phase_Tracking.rar 189KB

Deinterleaver.rar 167KB

Timing_Symcronization.rar 150KB

QAM16_Demapping.rar 150KB

Viterbi.rar 145KB

Descrambler.rar 133KB

transmit_MCU.restore 49KB

IFFT.restore 49KB

data_interleaver.restore 48KB

CP_ADDER.restore 48KB

clock_generator.restore 48KB

DATA_CONV_encode.restore 48KB

DATA_Pilot_Insert.restore 48KB

DATA_16AM_MAP.restore 48KB

short_training.restore 48KB

long_training.restore 48KB

DATA_Sramble.restore 48KB

fft_test.sym 3KB

共 227 条

<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD> <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'> <TABLE BORDER CELLSPACING=0 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'> <TD COLSPAN='4'>DATA_PILOT_INSERT Project Status</TD></TR> <TR ALIGN=LEFT> <TD BGCOLOR='#FFFF99'>Project File:</TD> <TD>DATA_Pilot_Insert.ise</TD> <TD BGCOLOR='#FFFF99'>Current State:</TD> <TD>New</TD> </TR> <TR ALIGN=LEFT> <TD BGCOLOR='#FFFF99'>Module Name:</TD> <TD>DATA_pilot_insertion</TD> <TD BGCOLOR='#FFFF99'><UL><LI>Errors:</LI></UL></TD> <TD> </TD> </TR> <TR ALIGN=LEFT> <TD BGCOLOR='#FFFF99'>Target Device:</TD> <TD>xc3s500e-4fg320</TD> <TD BGCOLOR='#FFFF99'><UL><LI>Warnings:</LI></UL></TD> <TD> </TD> </TR> <TR ALIGN=LEFT> <TD BGCOLOR='#FFFF99'>Product Version:</TD> <TD>ISE 9.2i</TD> <TD BGCOLOR='#FFFF99'><UL><LI>Updated:</LI></UL></TD> <TD>??? ?? 16 18:40:01 2008</TD> </TR> </TABLE>   <TABLE BORDER CELLSPACING=0 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'>DATA_PILOT_INSERT Partition Summary</TD></TR> <TR><TD COLSPAN='4'>No partition information was found.</TD></TR> </TABLE>   <TABLE BORDER CELLSPACING=0 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='6'>Detailed Reports</TD></TR> <TR BGCOLOR='#FFFF99'><TD>Report Name</TD><TD>Status</TD><TD>Generated</TD> <TD ALIGN=LEFT>Errors</TD><TD ALIGN=LEFT>Warnings</TD><TD ALIGN=LEFT>Infos</TD></TR> <TR ALIGN=LEFT><TD>Synthesis Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Translation Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Map Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Place and Route Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Static Timing Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Bitgen Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> </TABLE> </BODY></HTML>

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