/*
* linux/drivers/serial/99xx.c
*
* Based on drivers/serial/8250.c by Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This code is modified to support moschip 99xx series serial devices by ravikanthg@moschip.com
*/
#include <linux/version.h>
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,15)
#include <linux/config.h>
#endif
#if defined(CONFIG_SERIAL_99xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/console.h>
#include <linux/sysrq.h>
#include <linux/mca.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial_reg.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/nmi.h>
#include <linux/bitops.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/irq.h>
#include "99xx.h"
#define NORMAL_MODE 1
#define CASCADE_MODE 2
#define UART99xx_NR 16
//All transactions are with memory mapped registers
#define MEM_AXS 1
/*
* Definitions for PCI support.
*/
#define FL_BASE_MASK 0x0007
#define FL_BASE0 0x0000
#define FL_BASE1 0x0001
#define FL_BASE2 0x0002
#define FL_BASE3 0x0003
#define FL_BASE4 0x0004
#define FL_GET_BASE(x) (x & FL_BASE_MASK)
#if 0
#define DEBUG(fmt...) DEBUG(fmt)
#else
#define DEBUG(fmt...) do { } while (0)
#endif
//choose mode either as NORMAL_MODE or CASCADE_MODE
int mode = CASCADE_MODE;//NORMAL_MODE
struct uart_99xx_port {
struct uart_port port;
spinlock_t lock_99xx; //Per port lock
int tx_dma; //Variable to serialise the start_tx calls in dma mode
unsigned int dma_tx; //TX DMA enable or not
unsigned int dma_rx; //RX DMA enable or not
u8 ier; //Interrupt Enable Register
u8 lcr; //Line Control Register
u8 mcr; //Modem Control Register
u8 acr; //Additional Control Register
unsigned int capabilities; //port capabilities
int rxfifotrigger;
int txfifotrigger;
u32 dma_tx_cnt; //Amount of data to be DMA in TX
u32 dma_rx_cnt; //Amount of data to be DMA in RX
char * dma_tx_buf_v; //Virtual Address of DMA Buffer for TX
dma_addr_t dma_tx_buf_p; //Physical Address of DMA Buffer for TX
char * dma_rx_buf_v; //Virtual Address of DMA Buffer for RX
dma_addr_t dma_rx_buf_p; //Physical Address of DMA Buffer for TX
u32 part_done_recv_cnt; //RX DMA CIRC buffer Read index
int rx_dma_done_cnt;
int uart_mode; //SERIAL TYPE
int flow_control; //Flow control is enabled or not
int flow_ctrl_type; //Type of Flow control
u8 x_on; //X-ON Character
u8 x_off; //X-OFF Character
u32 ser_dcr_din_reg; //Device control register
u32 ser_ven_reg; //Vendor register
struct uart_99xx_port *next_port;
struct uart_99xx_port *prev_port;
};
static struct uart_99xx_port serial99xx_ports[UART99xx_NR];
static int test_mode=0;// Make it default to 0 after testing
static int nr_funs = 4;
struct uart_99xx_contxt{
int rx_dma_en;
//0-I/O mode of RX
//1 -DMA mode of RX
int tx_dma_en;
//0-I/O mode of TX
//1 -DMA mode of TX
int uart_mode;
//MCS99XX_RS232_MODE
//MCS99XX_RS422_MODE
//MCS99XX_RS485_HALF_DUPLEX
//MCS99XX_RS485_FULL_DUPLEX
int en_flow_control;
//0 - No H/W Flow Control
//1 - H/W Flow Control
int flow_ctrl_type;
//MCS99XX_DTR_DSR_HW_FLOWCONTROL
//MCS99XX_XON_XOFF_HW_FLOWCONTROL
//MCS99XX_RTS_CTS_HW_FLOWCONTROL
int rxfifotrigger; //0-127
int txfifotrigger; //0-127
int x_on;
int x_off;
};
static struct uart_99xx_contxt uart_99xx_contxts[] = {
//Port 0
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,//MCS99XX_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger = 64,
.txfifotrigger = 64,
.x_on = SERIAL_DEF_XON,
.x_off = SERIAL_DEF_XOFF,
},
//Port 1
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,//MCS99XX_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger = 64,
.txfifotrigger = 64,
.x_on= SERIAL_DEF_XON,
.x_off= SERIAL_DEF_XOFF,
},
//Port 2
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,//MCS99XX_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 3
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,//MCS99XX_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 4
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,//MCS99XX_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 5
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_DTR_DSR_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 6
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 7
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 8
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 9
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 10
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 11
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 12
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XOFF_HW_FLOWCONTROL,
.rxfifotrigger=64,
.txfifotrigger=64,
.x_on=SERIAL_DEF_XON,
.x_off=SERIAL_DEF_XOFF,
},
//Port 13
{
.rx_dma_en = 0,
.tx_dma_en = 0,
.uart_mode = MCS99XX_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = MCS99XX_XON_XO
没有合适的资源?快使用搜索试试~ 我知道了~
资源推荐
资源详情
资源评论
收起资源包目录
MCS9900_Linux.tar.gz (16个子文件)
MCS9900_Linux
MCS9900_NonCascade
MCS99XX_V_1.0.0.0
99xx.c 67KB
testreport 3KB
Module.markers 0B
99xx.h 5KB
Makefile 720B
readme 3KB
modules.order 59B
mcs99xx 15B
MCS9900_Cascade
MCS99XX-cascade_V_1.0.0.0
99xx.c 75KB
testreport 3KB
Module.markers 0B
99xx.h 5KB
Makefile 730B
readme 4KB
modules.order 67B
mcs99xx 15B
共 16 条
- 1
资源评论
magic1024
- 粉丝: 0
- 资源: 3
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功