# Parameters:
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
#----------------------------------------------------------------------------------------------
cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
cpu0.MPU_S=0x8 # (int , init-time) default = '0x8' : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10]
cpu0.MPU_NS=0x8 # (int , init-time) default = '0x8' : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10]
cpu0.ITM=0 # (bool , init-time) default = '1' : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included
cpu0.IRQLVL=0x3 # (int , init-time) default = '0x3' : Number of bits of interrupt priority : [0x3..0x8]
cpu0.BIGENDINIT=0 # (bool , init-time) default = '0' : Initialize processor to big endian mode
cpu0.INITSVTOR=0x00000000 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80]
cpu0.INITNSVTOR=0x0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80]
cpu0.SAU=0x0 # (int , init-time) default = '0x4' : Number of SAU regions (0 => no SAU) : [0x0..0x8]
cpu0.SAU_CTRL.ENABLE=0 # (bool , init-time) default = '0' : Enable SAU at reset
cpu0.SAU_CTRL.ALLNS=0 # (bool , init-time) default = '0' : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set
cpu0.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
cpu0.LOCK_SAU=0 # (bool , init-time) default = '0' : Lock down of SAU registers write
cpu0.LOCK_S_MPU=0 # (bool , init-time) default = '0' : Lock down of Secure MPU registers write
cpu0.LOCK_NS_MPU=0 # (bool , init-time) default = '0' : Lock down of Non-Secure MPU registers write
cpu0.CPIF=1 # (bool , init-time) default = '1' : Specifies whether the external coprocessor interface is included
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
fvp_mps2.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
fvp_mps2.SCC_ID.Variant=0x0 # (int , init-time) default = '0x0' : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF]
fvp_mps2.SCC_ID.Revision=0x1 # (int , init-time) default = '0x1' : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF]
fvp_mps2.platform_type=0x0 # (int , init-time) default = '0x0' : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2]
fvp_mps2.extra_psram=0 # (bool , init-time) default = '0' : Increases PSRAM to 32Mb
fvp_mps2.UART2.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout)
fvp_mps2.UART2.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART
fvp_mps2.UART2.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output
fvp_mps2.UART2.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence
fvp_mps2.UART2.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
fvp_mps2.UART2.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted
fvp_mps2.UART1.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout)
fvp_mps2.UART1.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART
fvp_mps2.UART1.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output
fvp_mps2.UART1.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence
fvp_mps2.UART1.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
fvp_mps2.UART1.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted
fvp_mps2.mps2_visualisation.rate_limit-enable=1 # (bool , init-time) default = '1' : Rate limit simulation.
fvp_mps2.mps2_visualisation.disable-visualisation=0 # (bool , init-time) default = '0' : Enable/disable visualisation
fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%" # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name)
fvp_mps2.mps2_visualisation.idler.delay_ms=0x32 # (int , init-time) default = '0x32' : Determines the period, in milliseconds of real time, between gui_callback() calls.
fvp_mps2.telnetterminal0.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode
fvp_mps2.telnetterminal0.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected
fvp_mps2.telnetterminal0.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
fvp_mps2.telnetterminal0.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr
fvp_mps2.telnetterminal0.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
fvp_mps2.telnetterminal1.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode
fvp_mps2.telnetterminal1.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected
fvp_mps2.telnetterminal1.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
fvp_mps2.telnetterminal1.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr
fvp_mps2.telnetterminal1.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application
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基于STM32+HC05蓝牙模块的蓝牙键盘 主要硬件:STM32F103C8T6, HC-05 无需蓝牙HID模块,无需其他特殊库或依赖 主要功能如下: 利用基于python的上位机程序将串口数据转为HID数据 STM32软件消抖 改键位无需重新烧录 - - 不懂运行,下载完可以私聊问,可远程教学 该资源内项目源码是个人的毕设,代码都测试ok,都是运行成功后才上传资源,答辩评审平均分达到96分,放心下载使用! <项目介绍> 1、该资源内项目代码都经过测试运行成功,功能ok的情况下才上传的,请放心下载使用! 2、本项目适合计算机相关专业(如计科、人工智能、通信工程、自动化、电子信息等)的在校学生、老师或者企业员工下载学习,也适合小白学习进阶,当然也可作为毕设项目、课程设计、作业、项目初期立项演示等。 3、如果基础还行,也可在此代码基础上进行修改,以实现其他功能,也可用于毕设、课设、作业等。 下载后请首先打开README.md文件(如有),仅供学习参考, 切勿用于商业用途。 --------
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基于STM32的蓝牙键盘,使用python将HC05串口蓝牙转为HID蓝牙+源代码+文档说明 (977个子文件)
iar_cortexM3b_math.a 2.72MB
iar_cortexM3l_math.a 2.71MB
libarm_cortexM3l_math.a 2.56MB
STM32F103.axf 189KB
arm_linear_interp_data.c 4.12MB
arm_common_tables.c 987KB
arm_dct4_init_f32.c 809KB
arm_dct4_init_q31.c 637KB
arm_dct4_init_q15.c 494KB
arm_rfft_init_f32.c 341KB
arm_rfft_init_q31.c 326KB
transform_tests_common_data.c 273KB
arm_rfft_init_q15.c 252KB
stm32f1xx_hal_i2c.c 239KB
stm32f1xx_hal_tim.c 238KB
stm32f1xx_hal_uart.c 132KB
stm32f1xx_hal_spi.c 125KB
stm32f1xx_hal_usart.c 98KB
stm32f1xx_hal_mmc.c 97KB
stm32f1xx_hal_sd.c 96KB
stm32f1xx_hal_irda.c 93KB
stm32f1xx_hal_adc.c 89KB
stm32f1xx_hal_smartcard.c 83KB
stm32f1xx_hal_can.c 78KB
stm32f1xx_hal_tim_ex.c 78KB
stm32f1xx_ll_usb.c 77KB
stm32f1xx_hal_eth.c 76KB
stm32f1xx_hal_nand.c 72KB
stm32f1xx_hal_pcd.c 71KB
filtering_test_common_data.c 64KB
stm32f1xx_hal_i2s.c 61KB
stm32f1xx_hal_rtc.c 57KB
arm_cfft_radix4_q15.c 55KB
stm32f1xx_hal_adc_ex.c 50KB
stm32f1xx_hal_nor.c 50KB
stm32f1xx_ll_sdmmc.c 49KB
stm32f1xx_hal_rcc.c 48KB
stm32f1xx_hal_dac.c 47KB
stm32f1xx_hal_hcd.c 47KB
stm32f1xx_ll_tim.c 44KB
arm_fft_bin_data.c 43KB
arm_conv_partial_fast_q15.c 43KB
stm32f1xx_ll_adc.c 40KB
arm_cfft_radix4_q31.c 39KB
arm_conv_fast_q15.c 38KB
stm32f1xx_ll_fsmc.c 38KB
arm_correlate_fast_q15.c 36KB
stm32f1xx_hal_flash_ex.c 35KB
arm_cfft_radix4_f32.c 34KB
stm32f1xx_hal_sram.c 33KB
controller_test_common_data.c 33KB
stm32f1xx_ll_utils.c 30KB
stm32f1xx_hal_cec.c 29KB
stm32f1xx_hal_rcc_ex.c 29KB
stm32f1xx_hal_pccard.c 29KB
arm_fir_f32.c 28KB
stm32f1xx_hal_flash.c 28KB
stm32f1xx_hal_dma.c 27KB
fir_tests.c 26KB
fast_math_tests_common_data.c 26KB
conv_tests.c 25KB
arm_conv_partial_q15.c 25KB
arm_correlate_q7.c 24KB
arm_conv_partial_q7.c 24KB
arm_graphic_equalizer_example_q31.c 23KB
biquad.c 23KB
arm_correlate_f32.c 22KB
arm_mat_inverse_f64.c 22KB
arm_mat_inverse_f32.c 22KB
arm_correlate_q15.c 22KB
lms.c 22KB
arm_biquad_cascade_stereo_df2T_f32.c 22KB
intrinsics_tests_common_data.c 22KB
arm_conv_q15.c 21KB
arm_conv_partial_f32.c 21KB
arm_conv_q7.c 21KB
arm_fir_q15.c 21KB
arm_conv_partial_fast_opt_q15.c 21KB
arm_conv_partial_fast_q31.c 21KB
arm_conv_partial_opt_q7.c 21KB
stm32f1xx_hal_gpio.c 20KB
stm32f1xx_hal_pwr.c 20KB
arm_correlate_q31.c 20KB
arm_conv_partial_opt_q15.c 20KB
arm_biquad_cascade_df1_32x64_q31.c 20KB
stm32f1xx_hal.c 20KB
arm_signal_converge_data.c 20KB
stm32f1xx_ll_spi.c 19KB
arm_correlate_fast_q31.c 19KB
arm_conv_partial_q31.c 19KB
arm_conv_f32.c 19KB
arm_fir_interpolate_f32.c 18KB
stm32f1xx_hal_cortex.c 18KB
arm_fir_decimate_q15.c 18KB
arm_conv_fast_q31.c 18KB
arm_cfft_f32.c 18KB
arm_depthwise_separable_conv_HWC_q7_nonsquare.c 18KB
arm_biquad_cascade_df2T_f64.c 17KB
arm_biquad_cascade_df2T_f32.c 17KB
arm_cfft_radix2_q15.c 17KB
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