basktball_score.zip资源-CSDN文库

共46个文件

v：9个

bin：8个

tfi：5个

需积分: 5 74 浏览量 2022-11-07 09:03:02 上传评论收藏 59KB ZIP 举报

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basktball_score.zip （46个子文件）

basktball_score

top_xst.xrpt 8KB

xst

projnav.tmp

dump.xst

top.prj

ngx

notopt

opt

work

vlg65

shumaguan.bin 10KB

vlg6F

top.bin 5KB

vlg1A

time12.bin 7KB

hdllib.ref 446B

vlg31

count__1.bin 2KB

count__down__24.bin 7KB

vlg30

count__0.bin 2KB

vlg10

score.bin 7KB

vlg73

ajxd.bin 3KB

shumaguan.cmd_log 218B

top.lso 6B

iseconfig

top.xreport 20KB

time12.cmd_log 209B

top.syr 5KB

basktball_score.gise 6KB

ajxd.v 989B

count_down_24.tfi 144B

_xmsgs

xst.xmsgs 3KB

netgen.xmsgs 665B

pn_parser.xmsgs 747B

score.cmd_log 412B

count_down_24.cmd_log 230B

top.prj 206B

ipcore_dir

basktball_score.xise 39KB

.lso 6B

top.tfi 301B

count_1.v 752B

top_summary.html 4KB

top.cmd_log 1KB

score.tfi 268B

top_envsettings.html 9KB

count_0.v 748B

time12.v 2KB

webtalk_pn.xml 3KB

shumaguan.tfi 232B

top.xst 1KB

netgen

synthesis

top_synthesis.nlf 745B

top_synthesis.v 20KB

top.ngc 15KB

shumaguan.v 3KB

count_down_24.v 2KB

time12.tfi 187B

top.v 1KB

top.ngr 9KB

score.v 2KB

<HTML><HEAD><TITLE>Xilinx System Settings Report</TITLE></HEAD> <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'> <center><big><big>System Settings</big></big></center> <A NAME="Environment Settings"></A>   <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'> <TD ALIGN=CENTER COLSPAN='5'> Environment Settings </TD> </tr> <tr bgcolor='#ffff99'> <td>Environment Variable</td> <td>xst</td> <td>ngdbuild</td> <td>map</td> <td>par</td> </tr> <tr> <td>PATHEXT</td> <td>.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>Path</td> <td>D:\ise\14.7\ISE_DS\ISE\\lib\nt64; D:\ise\14.7\ISE_DS\ISE\\bin\nt64; D:\ise\14.7\ISE_DS\ISE\bin\nt64; D:\ise\14.7\ISE_DS\ISE\lib\nt64; D:\ise\14.7\ISE_DS\ISE\..\..\..\DocNav; D:\ise\14.7\ISE_DS\PlanAhead\bin; D:\ise\14.7\ISE_DS\EDK\bin\nt64; D:\ise\14.7\ISE_DS\EDK\lib\nt64; D:\ise\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin; D:\ise\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; D:\ise\14.7\ISE_DS\EDK\gnuwin\bin; D:\ise\14.7\ISE_DS\EDK\gnu\arm\nt\bin; D:\ise\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin; D:\ise\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin; D:\ise\14.7\ISE_DS\common\bin\nt64; D:\ise\14.7\ISE_DS\common\lib\nt64; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Windows\System32\OpenSSH\; C:\Users\WJY\AppData\Local\Microsoft\WindowsApps</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINX</td> <td>D:\ise\14.7\ISE_DS\ISE\</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINX_DSP</td> <td>D:\ise\14.7\ISE_DS\ISE</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINX_EDK</td> <td>D:\ise\14.7\ISE_DS\EDK</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> <tr> <td>XILINX_PLANAHEAD</td> <td>D:\ise\14.7\ISE_DS\PlanAhead</td> <td>< data not available ></td> <td>< data not available ></td> <td>< data not available ></td> </tr> </TABLE> <A NAME="Synthesis Property Settings"></A>   <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'> <TD ALIGN=CENTER COLSPAN='4'>Synthesis Property Settings </TD> </tr> <tr bgcolor='#ffff99'> <td>Switch Name</td> <td>Property Name</td> <td>Value</td> <td>Default Value</td> </tr> <tr> <td>-ifn</td> <td> </td> <td>top.prj</td> <td> </td> </tr> <tr> <td>-ifmt</td> <td> </td> <td>mixed</td> <td>MIXED</td> </tr> <tr> <td>-ofn</td> <td> </td> <td>top</td> <td> </td> </tr> <tr> <td>-ofmt</td> <td> </td> <td>NGC</td> <td>NGC</td> </tr> <tr> <td>-p</td> <td> </td> <td>xc3s100e-4-cp132</td> <td> </td> </tr> <tr> <td>-top</td> <td> </td> <td>top</td> <td> </td> </tr> <tr> <td>-opt_mode</td> <td>Optimization Goal</td> <td>Speed</td> <td>SPEED</td> </tr> <tr> <td>-opt_level</td> <td>Optimization Effort</td> <td>1</td> <td>1</td> </tr> <tr> <td>-iuc</td> <td>Use synthesis Constraints File</td> <td>NO</td> <td>NO</td> </tr> <tr> <td>-keep_hierarchy</td> <td>Keep Hierarchy</td> <td>No</td> <td>NO</td> </tr> <tr> <td>-netlist_hierarchy</td> <td>Netlist Hierarchy</td> <td>As_Optimized</td> <td>as_optimized</td> </tr> <tr> <td>-rtlview</td> <td>Generate RTL Schematic</td> <td>Yes</td> <td>NO</td> </tr> <tr> <td>-glob_opt</td> <td>Global Optimization Goal</td> <td>AllClockNets</td> <td>ALLCLOCKNETS</td> </tr> <tr> <td>-read_cores</td> <td>Read Cores</td> <td>YES</td> <td>YES</td> </tr> <tr> <td>-write_timing_constraints</td> <td>Write Timing Constraints</td> <td>NO</td> <td>NO</td> </tr> <tr> <td>-cross_clock_analysis</td> <td>Cross Clock Analysis</td> <td>NO</td> <td>NO</td> </tr> <tr> <td>-bus_delimiter</td> <td>Bus Delimiter</td> <td><></td> <td><></td> </tr> <tr> <td>-slice_utilization_ratio</td> <td>Slice Utilization Ratio</td> <td>100</td> <td>100%</td> </tr> <tr> <td>-bram_utilization_ratio</td> <td>BRAM Utilization Ratio</td> <td>100</td> <td>100%</td> </tr> <tr> <td>-verilog2001</td> <td>Verilog 2001</td> <td>YES</td> <td>YES</td> </tr> <tr> <td>-fsm_extract</td> <td> </td> <td>YES</td> <td>YES</td> </tr> <tr> <td>-fsm_encoding</td> <td> </td> <td>Auto</td> <td>AUTO</td> </tr> <tr> <td>-safe_implementation</td> <td> </td> <td>No</td> <td>NO</td> </tr> <tr> <td>-fsm_style</td> <td> </td> <td>LUT</td> <td>LUT</td> </tr> <tr> <td>-ram_extract</td> <td> </td> <td>Yes</td> <td>YES</td> </tr> <tr> <td>-ram_style</td> <td> </td> <td>Auto</td> <td>AUTO</td> </tr> <tr> <td>-rom_extract</td> <td> </td> <td>Yes</td> <td>YES</td> </tr> <tr> <td>-shreg_extract</td> <td> </td> <td>YES</td> <td>YES</td> </tr> <tr> <td>-rom_style</td> <td> </td> <td>Auto</td> <td>AUTO</td> </tr> <tr> <td>-auto_bram_packing</td> <td> </td> <td>NO</td> <td>NO</td> </tr> <tr> <td>-resource_sharing</td> <td> </td> <td>YES</td> <td>YES</td> </tr> <tr> <td>-async_to_sync</td> <td> </td> <td>NO</td> <td>NO</td> </tr> <tr> <td>-mult_style</td> <td> </td> <td>Auto</td> <td>AUTO</td> </tr> <tr> <td>-iobuf</td> <td> </td> <td>YES</td> <td>YES</td> </tr> <tr> <td>-max_fanout</td> <td> </td> <td>500</td> <td>500</td> </tr> <tr> <td>-bufg</td> <td> </td> <td>24</td> <td>24</td> </tr> <tr> <td>-register_duplication</td> <td> </td> <td>YES</td> <td>YES</td> </tr> <tr> <td>-register_balancing</td> <td> </td> <td>No</td> <td>NO</td> </tr> <tr> <td>-optimize_primitives</td> <td> </td> <td>NO</td> <td>NO</td> </tr> <tr> <td>-use_clock_enable</td> <td> </td> <td>Yes</td> <td>YES</td> </tr> <tr> <td>-use_sync_set</td> <td> </td> <td>Yes</td> <td>YES</td> </tr> <tr> <td>-use_sync_reset</td> <td> </td> <td>Yes</td> <td>YES</td> </tr> <tr> <td>-iob</td> <td> </td> <td>Auto</td> <td>AUTO</td> </tr> <tr> <td>-equivalent_register_removal</td> <td> </td> <td>YES</td> <td>YES</td> </tr> <tr> <td>-slice_utilization_ratio_maxmargin</td> <td> </td> <td>5</td> <td>0%</td> </tr> </TABLE> <A NAME="Operating System Information"></A>   <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'> <TD ALIGN=CENTER COLSPAN='5'> Operating System Information </TD> </tr> <tr bgcolor='#ffff99'> <td>Operating System Information</td> <td>xst</td> <td>ngdbuild</td> <td>map</td> <td>par</td> </tr> <tr> <td>CPU Architecture/Speed</td> <td>12th Gen Intel(R) Core(TM) i5-12500H/3110 MHz</td> <td><  data not available  ></td> <td><  data not available  ></td> <td><  data not available  ></td> </tr> <tr> <td>Host</td> <td>DESKTOP-H92JO32</td> <td><f

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