# Auto Design Framework for Real-time Power System Simulators
A prototype implementation of an automatic design framework for real-time power system simulators, in the context of a diploma thesis. A ready-to-use test case is also included.
## General
The purpose of the project is to automate and simplify the design of customized hardware accelerators for power system simulation in the context of smart grids - microgrids, without concerning the user of the platform. The project is divided into two parts: the **user-oriented section**, written and tested in **Matlab R2017a**, and the **hardware-oriented section**, written in VHDL and tested in **ISE Design Suite 14.7 and Vivado 2019.1**. Currently, it supports power networks comprising passive elements (whatever can be modeled as a combination of resistors, inductors and capacitors) and linear transformer models. Support of voltage sources is limited to the user-oriented section for the time being, however current sources are fully compatible.
## Requirements
1. Matlab R2017a (possible compatibility with other versions supporting the Simscape library of Simulink and its Specialized Technology sublibrary)
2. ISE Design Suite 14.7 or Vivado 2019.1 (possible compatibility with other versions and platforms supporting VHDL-93 standard)
## Instructions for the test case's compilation
1. Clone the repository to your pc
2. Open the `user-oriented section` folder and run the `Circuit.slx` file.
3. Verify that the `Algorithm 1` and `Algorithm 2` blocks are visible. If not, check that the `auto_ps_sim_lib.slx` file is in the same directory as the `Circuit.slx`. If so, open the `auto_ps_sim_lib.slx` file, copy the `Algorithm 1` and `Algorithm 2` blocks and paste them into the open `Circuit.slx` file.
4. Press the Run button of Simulink, wait for the simulation to finish and double click on the `Algorithm 1` block to start the NIS analysis.
5. Type `y` to receive an error estimation between Simulink and NIS analysis/simulation, or `n` if you are no interested.
6. To convert the `Circuit.slx` model to VHDL-compatible format, double click on the `Algorithm 2` block and specify `word length of 34 bits and fraction length of 19 bits`. Also type `1` when asked if you want to generate text files that will be included to the hardware design.
7. Create a new design in ISE or Vivado design suite. Choose your desired FPGA or board.
7. When asked to add design sources, select all the files from the `hardware-oriented section` folder, except from the `testbench.vhd`, and all the Matlab-generated text files.
8. Synthesize the design.
9. If you want to simulate the design in Vivado, add the Matlab-generated text files and the `testbench.vhd` as simulation sources. In ISE, this isn't needed. Lastly, choose simulation time to be 2502 ns (it is necessary for the simulation and the collection of the results for this specific test case).
10. If you simulated the design in ISE or Vivado, open the directory where the simulation results reside and find `Vnodal_report.txt` and `Ibranch_report.txt`. Copy them to the directory where the `Circuit.slx` is, open it, rerun the Simulink simulation and double click on the `Algorithm 2` block again. This time, when asked, type `2` for error estimation between Simulink and VHDL results.
## Extension of the platform
This automatic framework is compatible with user designs or libraries. The above instructions also apply for these cases. Special care should be given in 3 Simulink parameters:
1. `Simulink Solver Type: must be "Fixed-step" for right error estimation results`
2. `Simulink Solver: must be "discrete" for right error estimation results`
![sim_solver](./images/sim_solver.png)
3. `"powergui" Simulation Type: must be "Discrete" for right error estimation results`
![powergui](./images/powergui.png)
For user library or model design, these are the compatible Simscape Specialized Technology components:
![models](./images/models.png)
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实时电力系统仿真器的自动设计框架Matlab代码.rar
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m:54个
vhd:11个
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1.版本:matlab2014/2019a/2024a 2.附赠案例数据可直接运行matlab程序。 3.代码特点:参数化编程、参数可方便更改、代码编程思路清晰、注释明细。 4.适用对象:计算机,电子信息工程、数学等专业的大学生课程设计、期末大作业和毕业设计。
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实时电力系统仿真器的自动设计框架Matlab代码.rar (72个子文件)
实时电力系统仿真器的自动设计框架Matlab代码
auto_power_system_simulator-master
user-oriented section
inverse.m 166B
Circuit_fp
inverse.m 166B
G_correction.m 2KB
PPA.m 6KB
emts.m 3KB
Vnodal_fixpt.m 2KB
Branch_Ihs.m 889B
fun1Ibr_fixpt.m 2KB
Vk_assign.m 673B
Vnodal_wrapper_fixpt.m 1KB
fun2Ihs_fixpt.m 2KB
fun1Ibr_wrapper_fixpt.m 1KB
Ibr_assign.m 1KB
fun2Ibr_fixpt.m 2KB
fun1Ihs_wrapper_fixpt.m 1KB
fun2Ihistory_wrapper_fixpt.m 1KB
outp_assign.m 746B
Ihs_assign.m 1KB
initial_state.m 8KB
branch_type.m 226B
fun1Ihistory_wrapper_fixpt.m 1KB
I_history_correction.m 497B
fun2Ihistory_fixpt.m 2KB
fun1Ihs_fixpt.m 2KB
Vnodal.m 298B
Transformer_correction.m 3KB
fun2Ibr_wrapper_fixpt.m 1KB
fun2Ihs_wrapper_fixpt.m 1KB
fun1Ihistory_fixpt.m 2KB
I_history_assign.m 2KB
G_correction.m 2KB
PPA.m 6KB
emts.m 5KB
fun2Ibr.m 295B
Branch_Ihs.m 889B
Vk_assign.m 673B
Ibr_assign.m 1KB
emts_FP.m 3KB
outp_assign.m 746B
Ihs_assign.m 1KB
initial_state.m 8KB
branch_type.m 226B
fun2Ihistory.m 367B
fun1Ihs.m 909B
array_read.m 391B
VHDL_format.m 5KB
I_history_correction.m 497B
Circuit_fp.prj 127KB
array_print.m 305B
Vnodal.m 298B
fun2Ihs.m 329B
Transformer_correction.m 3KB
auto_ps_sim_lib.slx 18KB
fun1Ibr.m 809B
fun1Ihistory.m 476B
Circuit.slx 24KB
I_history_assign.m 2KB
hardware-oriented section
ps_sim_package.vhd 6KB
history_currents.vhd 790B
nodal_voltages.vhd 421B
top_level.vhd 1KB
branch_voltages.vhd 841B
branch_currents.vhd 791B
ps_sim.vhd 2KB
nodal_currents.vhd 463B
ps_sim_support_package.vhd 2KB
support_package.vhd 907B
testbench.vhd 3KB
images
powergui.png 19KB
sim_solver.png 46KB
models.png 271KB
README.md 4KB
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