/**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in Flash or Sram, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
*
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STM32CUBEMX HAL定时器触发ADC采集DMA传输 (111个子文件)
TRGO_ADC.axf 670KB
system_stm32f1xx.c 15KB
stm32f1xx_it.c 7KB
tim.c 7KB
main.c 6KB
adc.c 4KB
usart.c 3KB
stm32f1xx_hal_msp.c 2KB
gpio.c 2KB
dma.c 2KB
stm32f1xx_hal_tim.crf 678KB
stm32f1xx_hal_tim_ex.crf 640KB
stm32f1xx_hal_uart.crf 636KB
stm32f1xx_hal_adc.crf 628KB
stm32f1xx_hal_dma.crf 626KB
stm32f1xx_hal_rcc.crf 626KB
stm32f1xx_hal_adc_ex.crf 624KB
main.crf 620KB
stm32f1xx_hal_flash_ex.crf 620KB
stm32f1xx_hal_flash.crf 619KB
stm32f1xx_hal_gpio.crf 618KB
stm32f1xx_hal_exti.crf 617KB
stm32f1xx_hal_pwr.crf 617KB
stm32f1xx_hal_rcc_ex.crf 617KB
tim.crf 616KB
stm32f1xx_hal.crf 616KB
adc.crf 615KB
stm32f1xx_hal_cortex.crf 615KB
usart.crf 615KB
stm32f1xx_it.crf 615KB
gpio.crf 615KB
system_stm32f1xx.crf 615KB
stm32f1xx_hal_msp.crf 615KB
dma.crf 614KB
stm32f1xx_hal_gpio_ex.crf 614KB
stm32f1xx_hal_flash_ex.d 4KB
stm32f1xx_hal_gpio_ex.d 4KB
stm32f1xx_hal_cortex.d 4KB
stm32f1xx_hal_rcc_ex.d 4KB
stm32f1xx_hal_tim_ex.d 4KB
stm32f1xx_hal_adc_ex.d 4KB
stm32f1xx_hal_flash.d 4KB
stm32f1xx_hal_exti.d 4KB
stm32f1xx_hal_gpio.d 4KB
stm32f1xx_hal_uart.d 4KB
stm32f1xx_hal_tim.d 4KB
stm32f1xx_hal_pwr.d 4KB
stm32f1xx_hal_rcc.d 4KB
stm32f1xx_hal_adc.d 4KB
stm32f1xx_hal_dma.d 4KB
stm32f1xx_hal_msp.d 4KB
system_stm32f1xx.d 3KB
stm32f1xx_it.d 3KB
stm32f1xx_hal.d 3KB
main.d 3KB
usart.d 3KB
gpio.d 3KB
adc.d 3KB
dma.d 3KB
tim.d 3KB
startup_stm32f103xe.d 55B
TRGO_ADC_STM32F103RC_1.0.0.dbgconf 2KB
TRGO_ADC_TRGO_ADC.dep 94KB
stm32f1xx_hal_conf.h 15KB
stm32f1xx_it.h 2KB
main.h 2KB
tim.h 1KB
dma.h 1KB
usart.h 1KB
adc.h 1KB
gpio.h 1KB
RTE_Components.h 340B
TRGO_ADC.hex 31KB
TRGO_ADC.htm 71KB
TRGO_ADC.build_log.htm 2KB
TRGO_ADC.ioc 8KB
TRGO_ADC.lnp 1KB
startup_stm32f103xe.lst 46KB
TRGO_ADC.map 183KB
.mxproject 10KB
stm32f1xx_hal_tim.o 888KB
stm32f1xx_hal_uart.o 785KB
stm32f1xx_hal_tim_ex.o 764KB
stm32f1xx_hal_adc.o 735KB
stm32f1xx_hal.o 725KB
stm32f1xx_hal_adc_ex.o 715KB
stm32f1xx_hal_cortex.o 715KB
stm32f1xx_hal_pwr.o 715KB
stm32f1xx_hal_rcc.o 714KB
stm32f1xx_hal_dma.o 713KB
stm32f1xx_hal_flash.o 712KB
stm32f1xx_hal_flash_ex.o 711KB
stm32f1xx_it.o 710KB
main.o 707KB
stm32f1xx_hal_exti.o 704KB
stm32f1xx_hal_gpio.o 704KB
tim.o 699KB
adc.o 696KB
stm32f1xx_hal_rcc_ex.o 696KB
usart.o 696KB
共 111 条
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