MICROSAR PDU Router
Technical Reference
DaVinci Configurator
Version 8.03.00
Authors
visehs, visms, visswa, visfrm, visbbk, vishho, vismij
Status
Released
Technical Reference MICROSAR PDU Router
© 2021 Vector Informatik GmbH Version 8.03.00 2
based on template version 4.9.2
Document Information
History
Author
Date
Version
Remarks
2012-12-20
1.00.00
Initial version based on PduR Technical Reference
visehs
2012-07-12
2.00.00
Adapted to AUTOSAR 4.0.3
visehs
2012-10-15
2.01.00
TP Gateway
IF Gateway
visms
2012-11-21
2.02.00
AR4-285: Support PduRRoutingPathGroups
visehs
2013-02-07
2.02.01
Adapted Tp- API description
visehs
2013-02-15
2.02.02
Added some ASR deviations
ESCAN00064126
visehs
2013-03-19
2.03.00
ESCAN00064364 AR4-325: Post-Build Loadable
Added Cancel- Receive/ Transmit Support
visehs
2014-04-15
2.04.00
Added TP routing with variable addresses
(MetaData Handling)
Added Threshold “0” support
visehs
2014-04-15
2.04.01
Support the StartOfReception API (with the PduInfoType),
TxConfirmation and RxIndication according ASR4.1.2
visehs
2014-09-01
2.05.00
Added SecOC to the Interface Overview
Extended Tp Gateway Routing behavior description
Updated Configuration Variant
visswa
2015-02-23
2.06.00
FEAT-1057: Added documentation about configuration of range
routing paths and functional requests gateway
visswa
2015-05-11
2.06.01
FEAT-1057: Improvements of documentation
visfrm
2015-07-30
2.07.00
FEAT-109: Added documentation for PduR switching feature and
N:1 routing paths
visfrm
2016-01-16
2.08.00
FEAT-1485: Added documentation for 1:N and N:1 transport
protocol routing paths
visms
2016-02-25
2.08.00
FEAT-1631: Trigger Transmit API with SduLength In/Out
according to ASR4.2.2
visehs
2016-03-17
2.08.00
added limitation:
- The Polling Mode cannot be used for N:1 routings.
- Cancel Transmit for N:1 routing paths is only supported if a Tx
Confirmation is enabled.
- Removed limitation: N:1 interface routing paths suppport only for
lower layer CanIf.
visfrm
2016-04-01
2.08.01
Removed empty chapters
visehs,
visfrm
2016-08-10
3.00.00
Shared/Dedicated Buffer support
Memory mapping extension
visswa
2016-11-24
3.00.00
Smart Learning (Switching)
Technical Reference MICROSAR PDU Router
© 2021 Vector Informatik GmbH Version 8.03.00 3
based on template version 4.9.2
visfrm
2017-06-22
3.00.01
ESCAN00095254: Missing DET error
PDUR_E_PDU_INSTANCES_LOST description in case of N:1
communication interface routings with upper layer
visfrm
2017-06-23
3.00.01
STORYC-1629: N:1 routing path support for IpduM Container
feature
visfrm
2017-09-21
3.01.00
STORYC-1972: Support 1:N Tx IF API Forwarding
visbbk
2017-11-07
3.02.00
STORYC-2031: Support buffered IF API Forwarding routing paths
visfrm
2018-01-30
3.03.00
STORYC-3416: PduR: Enable assignment of buffers smaller than
the associated PDU sizes to the buffer pool referenced by a
routing path
STORYC-3435: PduR: Enable routing paths with different
connected PDU sizes in gateway routings
vishho
2018-03-07
3.04.00
Maintenance (STORYC-3934)
vishho
2018-03-14
4.00.00
STORYC-3241: Implement Multicore Support
visfrm
2018-07-04
4.01.00
STORYC-4890: Release PduRBswModules on different Cores
visfrm
2019-02-25
5.00.00
STORYC-7435: Release [GW] Message Buffering in
MICROSAR
visfrm
2019-04-17
5.01.00
STORYC-7752: On-the-fly routing of (J1939) TP messages
visfrm
2019-08-12
5.02.00
ESCAN00103997:Old term 'TpBuffer' is still used instead of
'TxBuffer'
visfrm
2019-10-17
6.00.00
MSR4-117: PduR Support for Mixed ASIL Systems
visfrm
2019-11-21
6.01.00
COM-1247: Improve documentation for Mixed ASIL
MultiPartition Usecase
vismij
2020-02-27
6.02.00
COM-1409: PduR_PreInit documentation
visfrm
2020-07-07
7.00.00
COM-1300: Provide MC Queue Configuration Per Queue
visfrm
2020-09-29
7.01.00
COM-1898: Document MainFunction in PduR TechRef
visfrm
2020-10-15
8.00.00
COM-1850: Support Partition mapping via the GlobalPdu
visfrm
2020-12-07
8.01.00
COM-2158: Support Routing Paths from an Upper Layer to
another Upper Layer
COM-2001: Remove the AUTHOR IDENTITY
visfrm
2021-02-02
8.02.00
COM-2258: PduR: Support Dedicated Partition Reference
Parameter
COM-1973: Update Doc_TechRef with the new template
visfrm
2021-07-13
8.02.01
ESCAN00109725: Incorrect function signature documentation
for Appl_(Get|TryToGet|Release)Spinlock()
visssg
2021-08-30
8.03.00
ESCAN00110076: Missing description for Memory sections
mapping for Multi-Partition use case
Technical Reference MICROSAR PDU Router
© 2021 Vector Informatik GmbH Version 8.03.00 4
based on template version 4.9.2
Reference Documents
No.
Source
Title
Version
[1]
AUTOSAR
Specification of PDU Router
4.2.2
[2]
AUTOSAR
Specification of Development Error Tracer
3.2.0
[3]
AUTOSAR
List of Basic Software Modules
1.6.0
[4]
AUTOSAR
Specification of a Transport Layer for SAE J1939
1.5.0
[5]
Vector
TechnicalReference CanIf
see delivery
[6]
Vector
TechnicalReference <CAN Driver>
see delivery
[7]
Vector
TechnicalReference CanTp
see delivery
This technical reference describes the general use of the PduR basis software module.
Caution
We have configured the programs in accordance with your specifications in the
questionnaire. Whereas the programs do support other configurations than the one
specified in your questionnaire, Vector´s release of the programs delivered to your
company is expressly restricted to the configuration you have specified in the
questionnaire.
Technical Reference MICROSAR PDU Router
© 2021 Vector Informatik GmbH Version 8.03.00 5
based on template version 4.9.2
Contents
2.1.1 Deviations ................................................................................................. 11
2.1.2 Additions/ Extensions ................................................................................ 12
2.1.3 Limitations ................................................................................................. 12
2.4.1 Development Error Reporting .................................................................... 13
2.5.1 Data Provision ........................................................................................... 14
2.5.1.1 Direct data provision ............................................................... 14
2.5.1.2 Trigger transmit data provision ................................................ 14
2.5.2 Queued IF routing ..................................................................................... 14
2.5.2.1 FIFO Queue ............................................................................ 14
2.5.2.2 Single Buffer Queue ................................................................ 14
2.5.3 Timing aspects .......................................................................................... 14
2.5.4 Dynamic DLC Routing ............................................................................... 15
2.5.5 Transport protocol low level routing ........................................................... 15
2.5.6 Smart Learning (Switching) ....................................................................... 15
2.5.6.1 Configuration .......................................................................... 17
2.5.6.2 Example .................................................................................. 19
2.5.7 Queue overflow notification callback ......................................................... 21
2.5.8 N:1 Routing Paths with Upper Layer and Tx confirmation ......................... 22
2.6.1 Multi-Routing ............................................................................................. 23
2.6.2 TP Threshold............................................................................................. 23
2.6.2.1 Restrictions ............................................................................. 23
2.6.2.2 Threshold “0” .......................................................................... 24
2.6.3 Queued TP routing .................................................................................... 24
2.6.3.1 Supported Queues .................................................................. 24
2.6.3.2 TxBuffer Handling ................................................................... 25
2.6.4 Error Handling ........................................................................................... 25
2.6.5 Meta Data Handling .................................................................................. 25
2.7.1 Single Buffer Queue .................................................................................. 26
2.7.2 Communication Interface Queue ............................................................... 26
2.7.3 Shared Buffer Queue ................................................................................ 27
2.7.3.1 Tx Buffer Assignment .............................................................. 27
2.7.3.1.1 Explicit Tx Buffer assignment .............................. 27
2.7.3.1.2 Implicit Tx Buffer assignment .............................. 28
2.7.3.2 Tx Buffer Length Configuration ............................................... 29
2.7.3.2.1 Communication Interface .................................... 29
2.7.3.2.2 Transport Protocol .............................................. 29
2.7.3.3 Tx Buffer Selection Algorithm .................................................. 29
2.8.1 General configuration ................................................................................ 30
2.8.2 Multicore Queue ........................................................................................ 30
2.8.3 Deferred Event Cache ............................................................................... 31
