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* Copyright (c) 2012, Texas Instruments Incorporated
* All rights reserved.
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* * Redistributions in binary form must reproduce the above copyright
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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*******************************************************************************
*
* MSP430 CODE EXAMPLE DISCLAIMER
*
* MSP430 code examples are self-contained low-level programs that typically
* demonstrate a single peripheral function or device feature in a highly
* concise manner. For this the code may rely on the device's power-on default
* register values and settings such as the clock configuration and care must
* be taken when combining code from several examples to avoid potential side
* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
* for an API functional library-approach to peripheral configuration.
*
* --/COPYRIGHT--*/
//******************************************************************************
// MSP430FR59xx Demo - Stay in active mode with MCLK = 8MHz
//
// Description:
// The activeModeTest() function is intended to mimic a typical cache hit
// ratio for a real world application. The code itself is a combination of
// move, jump and math operations performed in an infinite loop.
// The active power for a typical cache hit ratio using MCLK=8MHz is measured
//
// ACLK = VLO, MCLK = SMCLK = 8MHz
//
//
// MSP430FR5969
// ---------------
// /|\| |
// | | |
// --|RST |
// | |
// | |
// | P1.0 |---> Disconnect JP9 for power meas.
//
// William Goh
// Texas Instruments Inc.
// October 2013
// Built with Code Composer Studio v5.5 and MSP430Ware 1.60.01.11
//******************************************************************************
#include <msp430.h>
void activeModeTest(void);
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
P1DIR = 0xFF;
P1OUT = 0;
P2DIR = 0xFF;
P2OUT = 0;
P3DIR = 0xFF;
P3OUT = 0;
P4DIR = 0xFF;
P4OUT = 0;
PJDIR = 0xFF;
PJOUT = 0;
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
CSCTL0_H = 0xA5; // Unlock CS registers
CSCTL1 = DCOFSEL_6; // Set DCO setting for 8MHz
CSCTL1 &= ~DCORSEL;
CSCTL2 = SELA__VLOCLK | SELS__DCOCLK | SELM__DCOCLK;
CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1; // MCLK = SMCLK = DCO = 8MHz
CSCTL0_H = 0; // Lock CS registers
// First part of Lab 1A is to measure with while(1) loop
// while(1);
// Second part of Lab1A is to measure the active mode current
// of a typical application use-case.
// Endless loop. Function never returns...
activeModeTest();
}
// This function executes the active mode power test.
void activeModeTest(void)
{
__asm("IDD_AM_L: \n"
" MOV #0x2000, R4 \n"
" MOV #0x4, 0(R4) \n"
" MOV &0x2000, &0x2002 \n"
" ADD @R4, 2(R4) \n"
" SWPB @R4+ \n"
" MOV @R4, R5 \n"
"IDD_AM_L1: \n"
" XOR @R4+, &0x2020 \n"
" DEC R5 \n"
" JNZ IDD_AM_L1 \n"
" XOR.B #0x01, &0x0202 \n"
" JMP IDD_AM_L ");
}
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