intel APL+RT5077A 参考设计
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N3 MATEBOOK 13 V4.0 LPDDR4
Intel Gemini Lake Platform
01--COVER PAGE
02--BLOCK DIAGRAM
03--POWER BLOCK DIAGRAM
04--SYSTEM LIST
05--GLK_SOC_MEM(CHA)
06--GLK_SOC_MEM(CHB)
07--GLK_SOC_(EMMC/SPI/LPC/AUD/PMU)
08--GLK_SOC(DDI/DSI)
09--GLK_SOC(I2C/CNV/LPSS/SPI/UART)
10--GLK_SOC(PCIE/SATA/USB)
11--GLK_SOC(JTAG/GPIO)
12--GLK_SOC(PWR)
13--GLK_SOC(GND)
14--GLK_SOC(DECAP)
15--GLK_SOC(STRAP)
16--MEM_LPDDR4_CHA0
17--MEM_LPDDR4_CHA1
18--MEM_LPDDR4_CHB0
19--MEM_LPDDR4_CHB1
20--LPDDR4_DECAPS
21--SYSTEM_SPI_FLASH
22--HDMI
23--EDP
24--EMMC
25--SD CRAD READER
26--SENSORS
27--TOUCH PANEL&SENSOR
28--SSD
29--WLAN
30--USB3.0
31--EC ITE8987
32--EC ROM &THERMAL SENSOR
33--HDD
34--POWER BUTTON
35--KEY BOARD&TOUCH PAD
36--IO BOARD CONN
37--DCIN&CHG LED&DEBUG CONN
38--CHARGE
39--POWER DELIVERY 3P3V
40--POWER DELIVERY 5P5V
41--PMIC RT5077_1
42--PMIC RT5077_2
43--POWER DELIVERY VDDQ
44--LOAD SWITCH
45--HOLE&BOSS
46--CHANGE LIST
47--
48--
49--
50--
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