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Accelerating

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Altera Corporation 1

AN-440-1.0 Preliminary

Application Note 440

Accelerating Nios II

Networking Applications

Introduction

Ethernet has become a standard data transport paradigm for embedded

systems across all applications. The reason for selecting Ethernet is

simple—the transport technology is (relatively) cheap, abundant

(networks are everywhere), mature, and reliable.

The primary goal of this application note is to provide you with

techniques to accelerate the performance of your Nios

II networking

application, and to show how certain key optimizations can improve the

overall performance of the system. The result of applying these

optimizations is noted in the benchmarking results section of this

application note. The secondary goal is to provide you with a better

understanding of how the different parts of a Nios II Ethernet-enabled

system work together, and how the interaction of these parts correspond

to the total networking performance of the system.

The Structure of

Networking

Applications

This section describes the different parts of a general networking

application.

Ethernet System Hierarchy

Figure 1 shows the flow of information from an embedded networking

application to the Ethernet.

Figure 1. The Ethernet System Hierarchy

The structure presented in Figure 1 shows a typical embedded

networking system. In general, a user application performs a job that

defines the goal of the embedded system (for example, controlling the

speed of a motor, serving as the UI for an embedded kiosk, and so forth).

The application uses an API (generally Sockets) provided by the

networking stack to send networking data to and from the embedded

system.

May 2007, ver. 1.0

2 Altera Corporation

Preliminary

Accelerating Nios II Networking Applications

The stack itself is a software library that converts data from the user

application into networking packets, and sends the packets via the

networking device. Networking stacks tend to be very complicated

software state machines that must be able to send data using a wide

variety of networking protocols (ARP, TCP, UDP, and so forth). These

stacks generally require a significant amount of processing power from

the CPU to get their job done.

The Ethernet device is used by the stack to move data across the physical

media. Most of a networking stack's interaction with the networking

device consists of shuttling Ethernet packets to and from the Ethernet

device.

The link layer, or physical media upon which the Ethernet datagrams

traverse, cannot be ignored when constructing a network enabled system.

Depending on the location of the embedded system, the Ethernet

datagrams may be traversing over a wide variety of physical links

(10/100 Mbit twisted pair, fiber optic, and so forth). Additionally, the

datagrams may experience latency if traversing long distances or need to

be broadcast through many network switches in order to arrive at their

destination.

Inter-Relationship of Elements

The total throughput performance of an embedded networking system is

highly dependent on the interaction of the user application, networking

stack, Ethernet device (and driver), as well as the physical connection for

the networking link. Making substantial performance improvements in

the network throughput often depends on optimizing the performance of

all these elements simultaneously.

In general, your networking application has some criteria for

performance that are either achieved or not. However, a good first order

approximation for determining the viability of your networking

application is to remove the user application from the system and

measure the total networking performance. This provides you with an

“upper bound” of total network performance, which you can use to

create your networking application. This application note uses a simple

benchmark program that determines the “raw” throughput rate of TCP

and UDP data transactions. This benchmark application does very little

apart from sending or receiving data through the networking stack. It

therefore provides us with a good approximation of the maximum

networking performance achievable.

Altera Corporation 3

Preliminary

The User Application

Finding the Performance Bottlenecks

There are a wide variety of tools available for analyzing the performance

of your Nios II embedded system and finding system bottlenecks. In this

application note, many of the techniques presented to increase overall

system (and networking) performance were discovered through the use

of these tools. While this application note doesn't explore the use of these

tools, and how they were applied to find networking bottlenecks in the

system, they are listed here for your information:

■ GNU Profiler

■ SOPC Builder Timer Peripheral

■ SOPC Builder Performance Counters

f For more information about finding general performance bottlenecks in

your Nios II embedded system, refer to AN 391: Profiling Nios II Systems.

The User

Application

In an embedded networking system, the application layer is the part of

the system where your “key task” is being completed. In general, this

application layer performs some work and then uses the network stack to

send and receive data. In a classic embedded networking system, your

application is being executed on the same CPU as the network stack, and

is also vying for computation resources.

To increase the throughput of your networking system, decrease the time

your application spends completing its task between the function calls it

makes to the networking stack. There is a two-fold benefit to doing this.

First, the faster your application runs to completion before sending or

receiving data, the more function calls it can make to the networking

stack (Sockets API) to move data across the network. Second, if the

application takes less of the processor's time to run, the more time the

processor has to operate the networking stack (and networking device)

and transmit the data.

User Application Optimizations

This section describes some effective ways to decrease the amount of time

your application uses the Nios II CPU.

Software Optimizations

■ Compiler Optimization Level—Compile your application with the

highest compiler optimization possible, –03. Higher optimizations

result in denser, more highly optimized code, thereby increasing the

computational efficiency of the processor.

4 Altera Corporation

Preliminary

Accelerating Nios II Networking Applications

■ MicroC/OS-II Thread Priority—Make sure that your application

task has the right MicroC/OS-II priority level assigned to it. In

general, the higher the priority of the application, the faster it runs to

completion. The application's priority levels should be balanced

against the priority levels assigned to the NicheStack's core tasks

discussed in “Structure of the NicheStack Networking Stack” on

page 8.

1 This suggestion assumes that your application is using

Altera’s recommended method for operating the

NicheStack Networking Stack, which requires using the

MicroC/OS-II operating system.

Hardware Optimizations

■ Processor Performance—The performance of the Nios II processor

can be increased in several ways:

● Computational Efficiency—Selecting the most

computationally efficient Nios II processor core is the quickest

way to improve overall application performance. The available

Nios II processor cores, in order of performance, are the

Nios II/f core (fastest), the Nios II/s core (standard), and the

Nios II/e core (slowest).

● Memory Bandwidth—Using low-latency, high speed memory

decreases the amount of time required by the processor to fetch

instructions and move data. Additionally, increasing the

processor's arbitration “share” of the memory via SOPC Builder

increases the processor's performance by allowing the Nios II

processor to perform more transactions to the memory before

another Avalon master can assume control of the memory.

● Instruction/ Data Caches—Adding an instruction and data

cache is an effective way to decrease the amount of time the

Nios II processor spends performing operations, especially in

systems that have slow memories (DDR SDRAM, SDRAM, and

so forth). In general, the larger the cache size selected for the

Nios II processor, the greater the performance improvement.

● Clock Frequency—Increasing the speed of the processor's clock

results in more instructions being executed per unit of time. To

gain the best performance possible, you should ensure that the

processor's execution memory is on the same clock domain as

the processor, to avoid the use of clock-crossing FIFOs.

One of the easiest ways to increase the operational clock

frequency of the processor and memory peripherals is to use an

SOPC Builder FIFO bridge peripheral to isolate the slower

peripherals of the system. With this peripheral, the processor,

memory, and Ethernet device are connected on one side of the

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