21
Analog Applications Journal
Texas Instruments Incorporated
1Q 2012 www.ti.com/aaj High-Performance Analog Products
Amplifiers: Op Amps
Measuring op amp settling time by using
sample-and-hold technique
Introduction
Modern high-speed operational amplifiers
(op amps) are designed with settling time in the
range of nanoseconds. This time is so brief that
measuring it within a reasonable error band
pre sents a challenging task not only on auto-
matic test equipment (ATE) but also on the
bench. In today’s op amp datasheets, settling
time is usually given as a simulated value due to
the cost and challenges associated with imple-
menting addi tional hardware to test it on the
bench. Traditional high-speed oscilloscopes have
only a 10-bit analog-to-digital converter, which
limits any measurement resolution to a maxi-
mum of 0.1%.
This article describes a new methodology that
has proven to be effective in making these measurements.
Detailed is a relatively inexpen sive and simple way to mea-
sure settling time that bases accuracy and precision on the
relative speed of the waveform generator and the sample-
and-hold circuit.
Step input for the device under test
In this article, settling time refers to the time that elapses
from the application of an ideal step input to the time at
which the device under test (DUT) enters and remains
within a specified error band that is symmetrical about
the final value. An ideal step input is easily generated in
simulation, but there are no instruments that can produce
an ideal step waveform in any lab setting. Even under
ideal conditions, the output of overdamped and critically
damped instruments would take a few RC time constants
to monotonically settle to within tenths of a percent of the
final value.
For underdamped systems, a step waveform can over-
shoot the final value, and ringing may occur. In practice,
even critically damped systems have underdamped
behaviors. Generally, the faster the fall time of the step
waveform, the more overshoot and ringing one observes.
This non-ideality is then propagated into the measured
output wave form of the DUT. Fortunately, with the aid of
computer-logged records of input and output data, the
output can be normalized by lining up the two and sub-
tracting the input from the output (with the DUT in a
non-inverting unity-gain configuration).
Flat-bottom pulse generator
When the falling edge of a waveform generator is used as
the input to the DUT, a flat-bottom pulse generator (FBPG)
can be used to clean up the low-voltage level of the gener-
ated signal. The FBPG clamps the falling voltage to ground
at the cost of a bigger overshoot. This gives test engineers
some control over trade-offs in the test setup. Similarly, a
flat-top pulse generator can be used to clean up the high-
voltage level.
Figure 1 illustrates two back-to-back high-speed Zener
diodes, each with a separate, adjustable power supply. As
a rule of thumb, the setup should be started as follows:
The R
supply
should be adjusted to obtain 5 V at the D1/D2
connection, and the V
generator
output voltage should be
adjusted to swing between a 2-V high and a –5-V low. This
should bias the output at 2 V
PP
and the low-voltage level
at 0 V. When V
generator
is high, D2 is turned off and D1 is
turned on. During this time, the output voltage becomes a
function of D1’s forward voltage (V
supply
) and of the amount
of current that flows through R
supply
and D1. When the
input is low, D1 is turned off and D2 is turned on. During
this time, the output voltage swings to ground, and its slew
rate is proportional to the amount of current that flows into
the matching resistor, R3. The transient response is a func-
tion of the diode’s capacitance, reverse recovery time, and
forward recovery voltage.
Because of the diodes’ nonlinearity, it does not make
sense to derive rigorous equations to determine the DC
levels and transient response of the FBPG. Instead, the
equations can be simulated in software such as TINA-TI™
from Texas Instruments. Assuming that the pulse genera-
tor is very fast, the fall time and overshoot of the output
waveform become functions of the diodes’ speed and
recovery time, as well as of the parasitic capacitance and
inductance of the printed circuit board (PCB) on which
the FBPG is built. In other words, the designer should pick
the fastest, most robust diode and follow guidelines for
By Roger Liang, Systems Engineer,
and Xavier Ramus, System Engineer, High-Speed Amplifiers
Pulse Generator
R
generator
+
50
50
D1
D2
R3
5 V
V
supply
Output
R
supply
V
OUT
V
generator
–
Figure 1. Flat-bottom pulse generator (FBPG)
๑ᆩ֑ᄣԍຍํ၄ሏ໙ݣٷഗ૬้
֪ۨ
ፕኁǖ
Roger Liang
Lj
ڤዝᅏഗ
(TI)
ဣཥ߾ײ
ᆅჾ
၄پߛሏ໙ݣٷഗ
(op amps)
ڦ૬้ۼ
ྺభ௱ፑᆸăኄ้߲සُڦ܌ሡăᅺ
ُLjᄲၙሞగ߲ࢇဃֶݔྷాܔഄႜ֪
ۨLjփৈৈܔጲۯ֪ยԢDŽ
ATE
Džᅃ߲వ
༶Lj๑ሞ߾ፕฉᄺవᅜྜׯăৃཀڦሏ໙
ݣٷഗׂຫກዐLjᅜఇెኵڦႚ๕ߴ
ׂڦ૬้ຕLjᇱᅺሞ߾ፕฉܔ
ഄႜ֪ႴᄲҾጎ߸ܠᆘยԢLjܸኄࣷሺ
֪ۨڦׯԨࢅవ܈ăدཥڦߛ๖հഗৈᆶ
ᅃ߲
10
Բ༬ఇຕገ࣑ഗLj၌କ֪ଉݴՐ୲
DŽፌٷ
0.1%
Džă
Ԩ࿔ถᅃዖႎݛ݆Ljഄঢ়ࡗኤᅜᆶၳںྜׯኄ
ၵ֪ଉ߾ፕăᅃዖ၎ܔگׯԨĂڇڦ૬้֪
ଉݛ݆ăኄዖݛ݆ӝጚඓႠࢅඓ܈૬ሞհႚิׯഗ
ࢅ֑ᄣԍۉୟڦ၎ܔ܈ฉă
֪ഗڦօ
Ԩ࿔ዐLj૬้ኸ๑ᆩగ߲ၙօLjڟ֪
ഗDŽ
DUT
Džժྼሞగ߲ࡀۨဃֶݔྷDŽዕኵܔ
Džాڦ้ăၙօඹᅟሞఇెዐׂิڥ
ڟLjڍሞํᄓዐඐுᆶీࠕׂิၙօհႚڦᅏഗ
ยԢă๑ሞၙཉူLjࡗፆࢅߛፆᅏഗڦ
ీႴᄲᅃၵ
RC
้ଉLjᅜڇۙں࿘ۨሞ
0.1%
ዕኵݔ
ྷᅜాă
ܔᇀᅃၵവፆဣཥܸჾLjօհႚࣷגዕኵLjժ
ీࣷ၄ናଯăํฉLj๑ߛፆဣཥᄺࣷᆶവ
ፆ၄ၡăᅃӯܸჾLjօհႚူইሁLjࡗ؋ࢅናଯ
ᄺ৽ሁܠăኮࢫLjኄዖݥၙጒدխ֪ഗڦ֪
ଉհႚă႞ሏڦLj૧ᆩ໙නኾࢅ
ຕLjཚࡗಇଚኄଇዖຕժᆩඁՍํ
၄ՔጚࣅDŽ֪ഗ๑ᆩཞ၎ڇ࿋ሺᅮದዃDžă
ೝڹஞ؋ิׯഗ
հႚิׯഗইᄂᆩፕ֪ഗڦ้Ljᅜ๑ᆩᅃ߲
ೝڹஞ؋ิׯഗDŽ
FBPG
Džઠೝኝิׯ႑ࡽڦگუۉೝă
ೝڹஞ؋ิׯഗইۉუഭথںLjپ၄߸ٷڦ
ࡗ؋ăኄᄣՍඟ֪߾ײీࠕཚࡗ֪ጎዃۙবೝ࢚
ํ၄ᅃۨײႾڦăཞᄣLj்ᅜ๑ᆩೝۥஞ؋ิ
ׯഗઠೝኝߛუۉೝă
1
၂๖କଇ߲ԝԝݣዃڦߛഋభܾ࠶Lj߲ܾ
࠶ۼᆶᅃ߲ڇ܀ĂۙবۉᇸăᅃӯᇱሶLjӀቷස
ူຩႾഔۯጎዃǖۙব
Rsupply
Ljڥ
D1/D2
থ
5V
ۉ
უLjࢫۙব
V
generator
ۉუLjඟഄሞ
2V
ߛუࢅ
-5V
گ
უኮӦۯăኄᄣՍሞ
2Vpp
ߛუۉೝࢅ
0V
گუۉೝ
ူܔႜೋዃăړ
V
generator
ྺߛ้Lj
D2
࠲ԿLj
D1
ഔăሞُLjۉუׯྺ
D1
ኟၠۉუDŽ
V
supply
Džڦ
ࡧຕLjཞ้ᄺୁঢ়
R
supply
ࢅ
D1
ۉୁଉڦࡧຕăړ
ྺگ้Lj
D1
࠲ԿLj
D2
ഔăሞُLjۉუӦ
থںۉუLjཞ้ഄገ࣑୲ᇑୁ၎ᆌۉፆഗ
R3
ڦۉୁ
ٷၭׯኟԲ૩࠲ဣăຨༀၚᆌᇑܾ࠶ۉඹĂݒၠ࣬ް
้ࢅኟၠ࣬ްۉუᆶ࠲ă
ᆯᇀܾ࠶ڦݥ၍Ⴀ༬ႠLjႴ๑ᆩჹڦݛײ๕ઠ໙
DC
ۉೝࢅೝڹஞ؋ิׯഗຨༀၚᆌăፕྺᅃዖ༺پݛ
݆LjᄺᅜሞDŽ૩සǖڤዝᅏഗࠅິڦ
TINA-TI™
Dž
ዐఇెኄၵݛײ๕ăยஞ؋ิׯഗڦ܈ݥLjሶ
հႚڦই้ࢅࡗ؋ᇑܾ࠶ڦ܈ࢅ࣬ް้ᆶ
࠲Ljཞ้ᄺᇑิۉඹࢅҾጎೝڹஞ؋ิׯഗڦᆇຘۉ
ୟӱDŽ
PCB
Džڦۉߌᆶ࠲ă࣑ࣆຫLjยටᇵᆌ
ስፌĂፌڦܾ࠶Ljժሞೝڹஞ؋ิׯഗᆩ
ᇀߛհႚิׯ้ፏთᆫႯ
PCB
քᇱሶă
૬้֪ଉڦ֑ᄣԍݛ݆
৽ኄถڦ૩ጱܸჾLj்ስ๑ᆩ
TI
ڦ
OPA615
DŽ
2
Džઠํ၄૬้֪ଉڦ֑ᄣԍDŽ
S/H
Džࠀ
ీLjኄᅺྺǖᆛᆶټሏ໙ڞݣٷഗDŽ
OTA
DžLj
1
ೝڹஞ؋ิׯഗ
(FBPG)
