Table of Figures
Figure 1-1: The ZedBoard Zynq Evaluation and Development Kit ................................... 6
Figure 2-1: Vivado Design Flow for Zynq ....................................................................... 12
Figure 2-2: New Project Wizard Part Selection ................................................................ 16
Figure 2-3: The Vivado GUI............................................................................................. 17
Figure 2-4: Blank Block Diagram view ............................................................................ 18
Figure 2-5: IP Catalog ....................................................................................................... 18
Figure 2-6: Processing System Block in the Block Diagram view ................................... 19
Figure 2-7: Processing System Re-customize IP view ..................................................... 20
Figure 2-8: Processing System 7....................................................................................... 21
Figure 2-9: Sources pane showing the system.bd file....................................................... 22
Figure 2-10: The SDK GUI ............................................................................................. 23
Figure 2-11: Address Map in SDK System.hdf Tab ......................................................... 24
Figure 2-12: ZedBoard Power switch and Jumper settings ........................................ 26
Figure 2-13: Serial Terminal Settings ............................................................................... 27
Figure 2-14: New Application Project Wizard ................................................................. 29
Figure 2-15: Hello World from Available Templates....................................................... 30
Figure 2-16: Successful Build ........................................................................................... 31
Figure 2-17: "Hello World" on the Serial Terminal ......................................................... 32
Figure 3-1: System Design Overview ............................................................................... 34
Figure 3-2: Connecting ports on two IP blocks ................................................................ 36
Figure 3-3: Completed Port Connections ......................................................................... 37
Figure 3-4: Assigned peripheral memory addresses ......................................................... 38
Figure 3-5: Adding a constraints file ................................................................................ 39
Figure 3-6: Constraints file added into project ................................................................. 39
Figure 3-7: Run Configurations menu with the Program FPGA operation checked ........ 42
Figure 3-8: Terminal showing application output ............................................................ 43
Figure 4-1: Debug Perspective Suspended ....................................................................... 44
Figure 4-2: Synthesis is up-to-date ................................................................................... 47
Figure 4-3: Open New Hardware Target screen ............................................................... 48
Figure 4-4: Identified devices in Hardware Manager ....................................................... 49
Figure 4-5: Debug Probes available for the waveform view ............................................ 50
Figure 4-6: Captured waveforms from the triggered run .................................................. 50
Figure 5-1: Linux Boot Process on the ZedBoard ............................................................ 53
Figure 5-2: Jumper Settings to boot in JTAG mode ......................................................... 55
Figure 5-3: Creating a Zynq QSPI Boot Image ................................................................ 59
Figure 5-4: Jumper Settings to boot in JTAG mode ......................................................... 60
Figure 5-5: QSPI programming interface ......................................................................... 61
Figure 5-6: Jumper Settings to boot in QSPI mode .......................................................... 61
Figure 5-7: Serial Terminal Window showing Linux Booting ......................................... 62
Figure 5-8: Jumper Settings to boot from SD Card .......................................................... 62
Figure 5-9: Application Project ........................................................................................ 64
Figure 5-10: Add An Empty Application ......................................................................... 65
Figure 5-11: Serial Terminal Window showing Linux Booting ....................................... 66
Figure 5-12: Serial Terminal Window showing Linux Booting ....................................... 67
© Copyright 2013 Xilinx
Page 4 Zynq ZedBoard Concepts, Tools, and Techniques 9/3/2014
52phn2016-10-13有用啊 ！！！！！
