JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
JESD300-5
FEBRUARY 2020
JEDEC
STANDARD
SPD5118, SPD5108 Hub and Serial
Presence Detect Device Standard
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JEDEC Standard No. 300-5
i
1 Scope .......................................................................................................................................1
2 Definition Of SPD5 5118, SPD5108 Hub Device for Memory Module Applications ..........1
2.1 Device Standard..................................................................................................................1
2.1.1 Description.................................................................................................................1
2.1.2 Common Features summary ......................................................................................2
2.2 Device Power Up ................................................................................................................2
2.3 Device Reset and Initialization ...........................................................................................3
2.4 I2C and I3C Basic Operation..............................................................................................4
2.5 Device Interface - IO Voltage Configuration .....................................................................4
2.5.1 Open Drain Interface w/ Internal On Die Pullup Resistor.........................................4
2.5.2 Open Drain Interface w/ External Pullup Resistor ....................................................5
2.5.3 Push Pull Interface w/ Internal On Die Pullup Resistor ............................................5
2.6 Device Interface - Protocol .................................................................................................6
2.6.1 Serial Address of the SPD5 Hub Device ...................................................................6
2.6.2 Serial Address of the Local Devices..........................................................................7
2.6.3 Switch from I2C Mode to I3C Basic Mode...............................................................7
2.6.4 Switch from I3C Basic Mode to I2C Mode...............................................................7
2.6.5 SPD5 Hub Device Selection ......................................................................................7
2.6.6 Local Device Selection Through the SPD5 Hub Device (Before SETHID CCC) ....8
2.6.7 Local Device Selection Through the SPD5 Hub Device (After SETHID CCC).....10
2.6.8 I2C Slave Protocol - Host to SPD5 Hub Device .....................................................10
2.6.9 I2C Slave Protocol - Host to Local Device Through SPD5 Hub Device ................14
2.6.10 I3C Basic Slave Protocol - Host to SPD5 Hub Device..........................................19
2.6.11 I3C Basic Slave Protocol - Host to Local Device (Through SPD5 Hub Device)..28
2.6.12 In Band Interrupt (IBI)...........................................................................................41
2.6.13 Packet Error Check (PEC) Function ......................................................................55
2.6.14 Parity Error Check Function ..................................................................................55
2.6.15 Packet Error Check & Parity Error Handling ........................................................56
2.6.16 CCC Packet Error Handling ..................................................................................61
2.6.17 I3C Basic Common Command Codes (CCC) .......................................................61
2.6.18 IO Operation ..........................................................................................................77
2.6.19 Bus Reset ...............................................................................................................78
2.6.20 Command Truth Table...........................................................................................79
2.7 SPD5 Hub Device Pin Definition .....................................................................................80
2.8 SPD5 Hub Device - Write and Read Access ....................................................................80
2.8.1 Write and Read Access - NVM Memory.................................................................80
2.8.2 Write and Read Access - Register Memory.............................................................81
2.9 Write Protection of Non-Volatile Memory.......................................................................81
2.9.1 Normal Run Time Operation (HSA Pin is tied to GND via a resistor value)..........81
2.9.2 Offline Tester Operation (HSA Pin is tied directly to GND, no resistor value)......81
2.9.3 Suggested Steps to Program SPD5 Hub Devices ....................................................81
2.10 AC Timing Definition.....................................................................................................82
2.10.1 I2C or I3C Basic Bus Timing ................................................................................82
2.10.2 Hub Propagation Delay..........................................................................................84
2.11 PARAMETRIC CHARACTERISTICS .........................................................................85
Contents
JEDEC Standard No. 300-5
ii
2.11.1 Absolute Maximum Ratings ..................................................................................85
2.11.2 Operating Condition, Measurement Condition & DC and AC Characteristics .....85
2.11.3 Temperature Sensor Performance .........................................................................90
2.12 Device Package and Pinout.............................................................................................90
2.12.1 Package Pinout.......................................................................................................91
2.12.2 Recommended Landing Pattern.............................................................................92
2.12.3 Mechanical Outline Drawing.................................................................................93
3 Volatile Registers Space .......................................................................................................94
3.1 Access Mechanism ...........................................................................................................94
3.1.1 Register Attribute Definition ...................................................................................94
3.2 Registers............................................................................................................................94
3.2.1 Register Map............................................................................................................94
3.2.2 Thermal Sensor Registers Read Out Mechanism ....................................................95
3.2.3 Register Description ................................................................................................97
Contents (cont’d)
JEDEC Standard No. 300-5
iii
Table 1 — Device Part Numbers & Feature Summary ...............................................................2
Table 2 — 7-bit Address of SPD5 Hub Device ...........................................................................6
Table 3 — 7-bit Address of the Local Devices (e.g., PMIC Device) ..........................................7
Table 4 — 7-bit Address of Each Hub Devices on I2C/I3C Bus ................................................8
Table 5 — 7-bit Address of Local Devices on I2C/I3C Bus .......................................................8
Table 6 — Write Command Data Packet; Table 113, “MR11” [3] = ‘0’ ..................................11
Table 7 — Write Command Data Packet; Table 113, “MR11” [3] = ‘1’ ..................................12
Table 8 — Read Command Data Packet; Table 113, “MR11” [3] = ‘0’ ...................................12
Table 9 — Read Command Data Packet; Table 113, “MR11” [3] = ‘1’ ...................................13
Table 10 — Read Command Data Packet w/ Default Address Pointer Mode ..........................13
Table 11 — Write Command Data Packet (e.g., TS) ................................................................14
Table 12 — Write Command Data Packet (e.g., PMIC) ...........................................................14
Table 13 — Write Command Data Packet (e.g., RCD; PEC Disabled) ....................................15
Table 14 — Write Command Data Packet (e.g., RCD; PEC Enabled) .....................................15
Table 15 — Read Command Data Packet (e.g., TS) .................................................................16
Table 16 — Read Command Data Packet (e.g., PMIC) ............................................................16
Table 17 — Read Command Data Packet (e.g., RCD; PEC Disabled; Legacy Format) ...........17
Table 18 — Read Command Data Packet (e.g., RCD; PEC Enabled; Legacy Format) ............18
Table 19 — Read Command Data Packet (e.g., RCD; PEC Disabled; Optimized Format) .....19
Table 20 — Write Command Data Packet; PEC Disabled ........................................................20
Table 21 — Write Command Data Packet; PEC Enabled .........................................................20
Table 22 — Write Command Data Packet w/IBI Header; PEC Disabled .................................21
Table 23 — Write Command Data Packet w/ IBI Header; PEC Enabled .................................22
Table 24 — Read Command Data Packet; PEC Disabled .........................................................23
Table 25 — Read Command Data Packet; PEC Enabled ..........................................................24
Table 26 — Read Command Data Packet w/IBI Header; PEC Disabled ..................................25
Table 27 — Read Command Data Packet w/IBI Header; PEC Enabled ...................................26
Table 28 — Read Command Data Packet w/ Read Address Pointer Mode; PEC Disabled .....27
Table 29 — Read Command Data Packet w/ Read Address Pointer Mode; PEC Enabled .......27
Table 30 — Read CMD Data Packet w/ Read Address Pointer Mode & IBI Header;
PEC Disabled .........................................................................................................27
Table 31 — Read CMD Data Packet w/ Read Address Pointer Mode & IBI Header;
PEC Enabled ..........................................................................................................28
Table 32 — Write Command Data Packet (e.g., TS); PEC Disabled ........................................28
Table 33 — Write Command Data Packet (e.g., TS); PEC Enabled .........................................29
Table 34 — Write Command Data Packet (e.g., PMIC); PEC Disabled ..................................29
Table 35 — Write Command Data Packet (e.g., PMIC); PEC Enabled ....................................30
Table 36 — Write Command Data Packet (e.g., RCD); PEC Disabled ....................................30
Table 37 — Write Command Data Packet (e.g., RCD); PEC Enabled .....................................31
Table 38 — Read Command Data Packet (e.g., TS); PEC Disabled ........................................32
Table 39 — Read Command Data Packet (e.g., TS); PEC Enabled ..........................................33
Table 40 — Read Command Data Packet (e.g., PMIC); PEC Disabled ...................................34
Table 41 — Read Command Data Packet (e.g., PMIC); PEC Enabled ....................................35
Table 42 — Read Command Data Packet (e.g., RCD); PEC Disabled .....................................36
Table 43 — Read Command Data Packet (e.g., RCD); PEC Enabled ......................................37
Table 44 — Hub IBI Payload Packet; PEC is Disabled ............................................................43
Table 45 — Hub IBI Payload Packet; PEC is Enabled .............................................................43
List of Tables