AMI BIOS Source Code (Luna Pier)

=============================================================================== CORE8 core history ------------------ This file contains history of core files including all core components. Core components: 1. Core components will not have tags and each check-in history except for USB and CPU or any other modules that is not labeled so often. 2. The history will be written inside its .CHM file. 3. Whenever component is labeled its label name and changes must be described here too. Now all issues are in EIP system, please use EIPXXXX as tag. ------------------------------------------------------------------------------- Next tags to be used: (Please update them after you added any one of them) CORE0300 IDE0046 BBS0028 USB0149 CPUP40084 CPUPB0053 CPUK7_0002 PXE0005 MPS0013 =============================================================================== Date: 12-17-2009 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ LABELED --- "BETA_5-8.00.16" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Corebin: "BETA_5-8.00.16" Coresrc: "BETA_5-8.00.16" AMI Board: "BETA_5-8.00.16_BOARD" NorthBridge: "BETA_5-8.00.16_NB-Template" Other modules: MPSTable: "8.00.13.MPSTable_12" AHCI: "8.00.14-AHCI_1.00.13" or AHCI2 =============================================================================== Date: 12-17-2009 TAG: CORE0299 Bug fix: Fixed that the option ROM executing order is changed in eLink GiveControlToOptROM_FAR. Severity: Low Symptom: The option ROM executing order is changed if the eLink EKGiveControlToOptROM_FAR is replaced by other SDL file. Root Cause: There are some eLink no eLink Priority defined and the parent link are incorrectly to be linked into GiveControlToOptROM_FAR. This will cause that the option ROM executing order is changed if the EKGiveControlToOptROM_FAR is replaced by other SDL file. Solution: Modified the eLink Priority & Parent to avoid the executing order is changed. Files: Corebin/800/Core/Base/Corelink.sdl ------------------------------------------------------------------------------- Date: 12-17-2009 TAG: EIP32939 Severity: Medium Symptom: CHECK_POINT_INI_STACK always output 34h, port 80h always output 34h for recovery. Cause: (ax) is destroyed in CHECK_POINT_INI. This is the side effect of EIP18074. Solution: Do not use "CHECK_POINT_INI al" in CHECK_POINT_INI_STACK: CheckPointIni_FAR, use (bl) instead. Files: Coresrc/800/Core/Asm/UB.ASM ------------------------------------------------------------------------------- Date: 12-14-2009 TAG: CORE0298 Improvement: Add eLink for 64bit memory resource update. Description: Create an eLink to instead of hook "getAddressableTOM". This is able to let OEM/Chipset easy to update the 64bit memory resource available region. Note: Please include the original hook "getAddressableTOM" into the new eLink "GetPciAddressableMemory" for this change if the hook had porting already. Files: Coresrc/800/Core/Asm/PCI-BR.ASM Corebin/800/Core/Base/Corelink.sdl Corebin/800/Chipset/Template/NorthBridge/CSP/POSTDIM.ASM Corebin/800/Chipset/Template/NorthBridge/CSP/NB.SDL Corebin/800/Board/AMI Board/BSP/OEMDIM.ASM ------------------------------------------------------------------------------- Date: 12-10-2009 TAG: EIP29873 Bug fix: Fixed that interrupt flag be clear after Int15 function 24h. Severity: Low Symptom: Some option ROM will get halt after update kernel to 8.00.15 or later. Root Cause: The interrupt will be disabled after implemented BUG5169 fixed. This will lead to taht option ROM can't signal interrupt after Int15 function 24h. Solution: Resume that enabled interrupt flag before exit Int15 function 24h. Files: NRUNTIME.ASM ------------------------------------------------------------------------------- Date: 12-09-2009 TAG: EIP29077 Improvement: Can not display up to 32 chars for option ROM string if it contains continuous spaces. Severity: Low Symptom: If option rom device string = "0123456789 01234567 8901 2345", it will be disaplyed as "0123456789 01234567 8901 2" Cause: We try to gobble up the space from .StrPtr and duplicated spaces are not stored to .DevString but the loop counter is still count it. Solution: Do not decrease counter when duplicatd spaces is found. Also fix the problem of displaying only MAX_CHAR_COUNT-2 chars (0 is end of string), not the MAX_CHAR_COUNT-1. Files: Coresrc/800/Core/Asm/BBS1.INC ------------------------------------------------------------------------------- Date: 12-09-2009 TAG: EIP32153 Bug fixed: Fixed "DMA Controller Error" in POST for VIA chipset. Severity: Low Cause: When we enable forwarding port 84h and 88h to LPC for debug purpose on VIA chipsets, those ports are write-only. Solution: Only do read/write test on DMA ports for channels, not straight from port 81h to 8Eh. Files: Coresrc/800/Core/Asm/DMAC.ASM ------------------------------------------------------------------------------- Date: 12-07-2009 TAG: EIP30415 Feature Add kernel required changes for SDIO module. Description Add SDIO definitions, equations, pnp headers, some kernel code and so on to support SDIO module. File: BBS.EQU BBS1.INC INT13PE.ASM INT13PNP.ASM INT13PNP.EQU ------------------------------------------------------------------------------- Date: 12-03-2009 TAG: EIP31881 Bug fix: MMIO resource assign does not be optimal in Core labeled BETA_4-8.00.16. Severity: Low Symptom: Top of memory will less than Core 8.00.15. Root Cause: In order to avoid resource overlap, DIM will will search a large space for allocation. This may lead to the gap is grater than Core 8.00.15 in some platform. Solution: Change the allocation method to eliminate the resource gaps of one device. Files: PCI-BR.ASM =============================================================================== Date: 09-29-2009 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ LABELED --- "BETA_4-8.00.16" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Corebin: "BETA_4-8.00.16" Coresrc: "BETA_4-8.00.16" AMI Board: "BETA_2-8.00.16_BOARD" NorthBridge: "BETA_2-8.00.16_NB-Template" Other modules: MPSTable: "8.00.13.MPSTable_12" AHCI: "8.00.14-AHCI_1.00.13" or AHCI2 =============================================================================== Date: 09-17-2009 TAG: EIP24720 Bug fix: POST Code 0x75 wait too long on nvdia chipset Severity: Low Symptom: POST Code 0x75 wait too long Root Cause: If no device on the SATA bus. Controller status register is 7fh of ffh. Solution: Check status register if not 7fh of ffh. It is no device on bus. Files: Coresrc/800/Core/Asm/AUTO.ASM Corebin/800/Board/AMI Board/BSP/OEMCFG.asm ------------------------------------------------------------------------------- Date: 09-16-2009 TAG: EIP26147 Improvement: Add ISR chaining support for USB_MODE = 3. Description: Port the chaining ISR support in procedure 'USBInterruptHandler' in USB.ASM to the same procedure in USBIF.ASM. Files: USB.ASM USB.EQU USBIF.ASM USBWRAP.ASM ------------------------------------------------------------------------------- Date: 09-10-2009 TAG: EIP25509 Bug fix: The USB keyboard led status is not synchronized with PS/2. Severity: Low Symptom: Press "NumLock" of PS/2 Keyboard, USB Keyboard will not update if "USB 2.0 Control