/**
**********************************************************************************************************************
* @file stm32h5xx_hal_i3c.c
* @author MCD Application Team
* @brief I3C HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Improvement Inter Integrated Circuit (I3C) peripheral:
* + Initialization and de-initialization functions
* + IO operation functions
* + Peripheral State and Errors functions
*
**********************************************************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
**********************************************************************************************************************
@verbatim
======================================================================================================================
##### How to use this driver #####
======================================================================================================================
[..]
The I3C HAL driver can be used as follows:
(#) Declare a I3C_HandleTypeDef handle structure, for example:
I3C_HandleTypeDef hi3c;
(#) Declare a I3C_XferTypeDef transfer descriptor structure, for example:
I3C_XferTypeDef ContextBuffers;
(#)Initialize the I3C low level resources by implementing the HAL_I3C_MspInit() API:
(##) Enable the I3Cx interface clock
(##) I3C pins configuration
(+++) Enable the clock for the I3C GPIOs
(+++) Configure I3C pins as alternate function push-pull with no-pull
(##) NVIC configuration if you need to use interrupt process
(+++) Configure the I3Cx interrupt priority
(+++) Enable the NVIC I3C IRQ Channel
(##) DMA Configuration if you need to use DMA process
(+++) Declare a DMA_HandleTypeDef handle structure for
the Command Common Code (CCC) management channel
(+++) Declare a DMA_HandleTypeDef handle structure for
the transmit channel
(+++) Declare a DMA_HandleTypeDef handle structure for
the receive channel
(+++) Declare a DMA_HandleTypeDef handle structure for
the status channel
(+++) Enable the DMAx interface clock
(+++) Configure the DMA handle parameters
(+++) Configure the DMA Command Common Code (CCC) channel
(+++) Configure the DMA Tx channel
(+++) Configure the DMA Rx channel
(+++) Configure the DMA Status channel
(+++) Associate the initialized DMA handle to the hi3c DMA CCC, Tx, Rx or Status handle as necessary
(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
the DMA CCC, Tx, Rx or Status instance
(#) Configure the HAL I3C Communication Mode as Controller or Target in the hi3c Init structure.
(#) Configure the Controller Communication Bus characterics for Controller mode.
This mean, configure the parameters SDAHoldTime, WaitTime, SCLPPLowDuration,
SCLI3CHighDuration, SCLODLowDuration, SCLI2CHighDuration, BusFreeDuration,
BusIdleDuration in the LL_I3C_CtrlBusConfTypeDef structure through h3c Init structure.
(#) Configure the Target Communication Bus characterics for Target mode.
This mean, configure the parameter BusAvailableDuration in the LL_I3C_TgtBusConfTypeDef structure
through h3c Init structure.
All these parameters for Controller or Target can be configured directly in user code or
by using CubeMx generation.
To help the computation of the different parameters, the recommendation is to use CubeMx.
Those parameters can be modified after the hi3c initialization by using
HAL_I3C_Ctrl_BusCharacteristicConfig() for controller and
HAL_I3C_Tgt_BusCharacteristicConfig() for target.
(#) Initialize the I3C registers by calling the HAL_I3C_Init(), configures also the low level Hardware
(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I3C_MspInit(&hi3c) API.
(#) Configure the different FIFO parameters in I3C_FifoConfTypeDef structure as RxFifoThreshold, TxFifoThreshold
for Controller or Target mode.
And enable/disable the Control or Status FIFO only for Controller Mode.
Use HAL_I3C_SetConfigFifo() function to finalize the configuration, and HAL_I3C_GetConfigFifo() to retrieve
FIFO configuration.
Possibility to clear the FIFO configuration by using HAL_I3C_ClearConfigFifo() which reset the configuration
FIFO to their default hardware value
(#) Configure the different additional Controller configuration in I3C_CtrlConfTypeDef structure as DynamicAddr,
StallTime, HotJoinAllowed, ACKStallState, CCCStallState, TxStallState, RxStallState, HighKeeperSDA.
Use HAL_I3C_Ctrl_Config() function to finalize the Controller configuration.
(#) Configure the different additional Target configuration in I3C_TgtConfTypeDef structure as Identifier,
MIPIIdentifier, CtrlRoleRequest, HotJoinRequest, IBIRequest, IBIPayload, IBIPayloadSize, MaxReadDataSize,
MaxWriteDataSize, CtrlCapability, GroupAddrCapability, DataTurnAroundDuration, MaxReadTurnAround,
MaxDataSpeed, MaxSpeedLimitation, HandOffActivityState, HandOffDelay, PendingReadMDB.
Use HAL_I3C_Tgt_Config() function to finalize the Target configuration.
(#) Before initiate any IO operation, the application must launch an assignment of the different
Target dynamic address by using HAL_I3C_Ctrl_DynAddrAssign() in polling mode or
HAL_I3C_Ctrl_DynAddrAssign_IT() in interrupt mode.
This procedure is named Enter Dynamic Address Assignment (ENTDAA CCC command).
For the initiation of ENTDAA procedure from the controller, each target connected and powered on the I3C bus
must repond to this particular Command Common Code by sending its proper Payload (a amount of 48bits which
contain the target characteristics)
Each time a target responds to ENTDAA sequence, the application is informed through
HAL_I3C_TgtReqDynamicAddrCallback() of the reception of the target paylaod.
And then application must send a associated dynamic address through HAL_I3C_Ctrl_SetDynAddr().
This procedure in loop automatically in hardware side until a target respond to repeated ENTDAA sequence.
The application is informed of the end of the procedure at reception of HAL_I3C_CtrlDAACpltCallback().
At the end of procedure, the function HAL_I3C_Ctrl_ConfigBusDevices() must be called to store in hardware
register part the target capabilities as Dynamic address, IBI support with or without additional data byte,
Controller role request support, Controller stop transfer after IBI through I3C_DeviceConfTypeDef structure.
(#) Other action to be done, before initiate any IO operation, the application must prepare the different frame
descriptor with its associated buffer allocation in their side.
Configure the different information related to CCC transfer through I3C_CCCTypeDef structure
Configure the different information related to Private or I2C transfer through I3C_PrivateTypeDef structure
Configure the different buffer pointers and associated size needed for the driver communication
through I3C_XferTypeDef structure
The I3C_XferTypeDef structur
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rt-thread-code-stm32h743-atk-apollo.rar阿波罗 STM32H743 (2000个子文件)
stm32h5xx_hal_i3c.c 337KB
stm32h5xx_hal_tim.c 259KB
stm32u5xx_hal_tim.c 257KB
stm32h5xx_hal_i2c.c 246KB
stm32wlxx_hal_tim.c 244KB
stm32g0xx_hal_tim.c 244KB
stm32l5xx_hal_tim.c 244KB
stm32f1xx_hal_i2c.c 238KB
stm32f0xx_hal_tim.c 238KB
stm32f2xx_hal_tim.c 235KB
stm32f1xx_hal_tim.c 235KB
stm32f2xx_hal_i2c.c 234KB
stm32u5xx_hal_i2c.c 230KB
stm32mp1xx_hal_i2c.c 228KB
stm32g0xx_hal_i2c.c 218KB
stm32wlxx_hal_i2c.c 217KB
stm32f0xx_hal_i2c.c 217KB
stm32mp1xx_hal_tim.c 214KB
stm32l5xx_hal_i2c.c 214KB
stm32h5xx_hal_cryp.c 212KB
stm32h5xx_hal_rcc_ex.c 212KB
stm32u5xx_hal_cryp.c 191KB
stm32g0xx_hal_cryp.c 187KB
stm32wlxx_hal_cryp.c 187KB
stm32l5xx_hal_cryp.c 185KB
stm32mp1xx_hal_fdcan.c 169KB
stm32h5xx_hal_dma_ex.c 169KB
stm32u5xx_hal_dma_ex.c 168KB
stm32u5xx_hal_adc.c 166KB
stm32h5xx_hal_uart.c 158KB
stm32wlxx_hal_uart.c 157KB
stm32g0xx_hal_uart.c 156KB
stm32mp1xx_hal_cryp.c 155KB
stm32u5xx_hal_uart.c 151KB
stm32l5xx_hal_uart.c 149KB
stm32mp1xx_hal_uart.c 149KB
stm32h5xx_hal_adc.c 146KB
stm32mp1xx_hal_adc.c 144KB
stm32l5xx_hal_adc.c 141KB
stm32wlxx_hal_spi.c 138KB
stm32f0xx_hal_spi.c 137KB
stm32l5xx_hal_spi.c 137KB
stm32mp1xx_hal_usart.c 136KB
stm32g0xx_hal_spi.c 136KB
stm32f0xx_hal_uart.c 136KB
stm32h5xx_hal_mmc.c 136KB
stm32h5xx_hal_usart.c 132KB
ipc.c 131KB
stm32u5xx_hal_hash.c 131KB
stm32wlxx_hal_usart.c 130KB
stm32g0xx_hal_usart.c 129KB
stm32f1xx_hal_uart.c 128KB
stm32f2xx_hal_uart.c 128KB
stm32u5xx_hal_usart.c 127KB
stm32l5xx_hal_hash.c 126KB
stm32h5xx_hal_smartcard.c 125KB
stm32h5xx_hal_sd.c 125KB
stm32f1xx_hal_spi.c 124KB
stm32f2xx_hal_hash.c 123KB
stm32l5xx_hal_mmc.c 123KB
stm32mp1xx_hal_dfsdm.c 123KB
stm32u5xx_hal_smartcard.c 123KB
stm32l5xx_hal_dfsdm.c 123KB
stm32l5xx_hal_sd.c 122KB
stm32mp1xx_hal_smartcard.c 122KB
stm32u5xx_hal_tim_ex.c 122KB
stm32l5xx_hal_usart.c 121KB
stm32l5xx_hal_smartcard.c 121KB
stm32g0xx_hal_smartcard.c 121KB
stm32u5xx_hal_mmc.c 121KB
stm32wlxx_hal_smartcard.c 121KB
stm32h5xx_hal_fdcan.c 120KB
stm32f2xx_hal_spi.c 120KB
stm32l5xx_hal_fdcan.c 119KB
stm32u5xx_hal_fdcan.c 119KB
stm32u5xx_hal_sd.c 119KB
stm32u5xx_hal_spi.c 119KB
stm32h5xx_hal_tim_ex.c 119KB
stm32g0xx_hal_fdcan.c 118KB
stm32u5xx_hal_rcc_ex.c 117KB
stm32mp1xx_hal_spi.c 116KB
stm32u5xx_hal_ospi.c 116KB
stm32h5xx_hal_spi.c 116KB
stm32h5xx_hal_lptim.c 115KB
stm32g0xx_hal_adc.c 114KB
stm32wlxx_hal_adc.c 114KB
stm32u5xx_hal_lptim.c 114KB
stm32h5xx_hal_eth.c 113KB
stm32mp1xx_hal_hash.c 110KB
stm32f0xx_hal_smartcard.c 110KB
stm32f0xx_hal_usart.c 109KB
stm32u5xx_hal_mdf.c 107KB
stm32wlxx_hal_irda.c 106KB
stm32h5xx_hal_xspi.c 105KB
stm32g0xx_hal_irda.c 105KB
stm32mp1xx_hal_sd.c 105KB
stm32f0xx_hal_irda.c 105KB
stm32h5xx_hal_irda.c 105KB
stm32h5xx_hal_hash.c 103KB
stm32u5xx_hal_irda.c 103KB
共 2000 条
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