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Freescale Semiconductor

Application Note

1 Introduction

This application note is provided to assist those engineers

wishing to use the serial RapidIO message unit on the

PowerQUICC™ III. It has been written for and tested on the

MPC8548 processor, but may also apply to other members of

the PowerQUICC III family. This document is not intended

as a replacement for the MPC8548 reference manual and

should be read in conjunction with that document.

This document summarizes the features and uses of the

RapidIO messaging unit (including data messages, doorbell

messages and inbound port-writes) and provides example

code. These extracted code segments are part of a simple

application, written to run on top of U-Boot, to prove the

functionality of the messaging unit.

The following section descriptions provide an overview of

this document.

Section 2, “RapidIO Messaging,” summarizes the relevant

aspects of the RapidIO message passing logical

specification.

Section 3, “PowerQUICC III Serial RapidIO Messaging

Unit,” summarizes the messaging unit implemented on the

MPC8548.

Document Number: AN2923

Rev. 0, 09/2005

Contents

1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2. RapidIO Messaging . . . . . . . . . . . . . . . . . . . . . . . . . . 2

3. PowerQUICC III Serial RapidIO Messaging Unit . . . 3

4. Example Software Extracts . . . . . . . . . . . . . . . . . . . . . 8

5. References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Using the Serial RapidIO Messaging Unit on

PowerQUICC™ III

by Lorraine McLuckie

Freescale Semiconductor, Inc.

East Kilbride, Scotland

Using the Serial RapidIO Messaging Unit on PowerQUICC™ III, Rev. 0

2 Freescale Semiconductor

RapidIO Messaging

Section 4, “Example Software Extracts,” contains software extracts to demonstrate the use of the

messaging units on the MPC8548.

Section 5, “References,” provides a list of references corresponding to the numbered notes throughout this

document.

Section 6, “Revision History,” gives the revision history for this document.

2 RapidIO Messaging

The RapidIO specification includes a message passing logical specification.

In the message passing

model, processing elements are only allowed to access memory local to themselves, and communication

between processing elements is handled by specialized hardware and controlled by software.

For two processors to communicate, the sending processor uses a local message passing device that reads

a section of the sender’s local memory and moves that information across the RapidIO interconnect to the

receiving processor’s message passing device. If enabled, the receiver’s message passing device then

stores that information in the receiving processor’s local memory and informs the receiving processor that

a message has arrived. The receiving processor then accesses its local memory to read the message.

The logical specification defines two kinds of message passing transactions: data messages and doorbell

messages.

2.1 Data Messages

The data message operation, consisting of message request and response transactions, is used by a

processing element’s message passing hardware to send a data message to other processing elements.

A data message operation can consist of up to 16 individual message transactions. Message transaction

data payloads are always multiples of 8 bytes (although not all multiples of 8 bytes are permitted), up to a

maximum of 256 bytes. Therefore the maximum data message operation size is 4 Kbytes.

Data messages use the type 11 packet format.

2.2 Doorbells

The doorbell operation, consisting of doorbell request and response transactions, is used by a processing

element to send a very short message to another processor. The doorbell transaction contains a 16-bit

information field to hold the information destined for the recipient; it does not have a separate data payload

field.

Doorbells use the type 10 packet format.

2.3 Port-Writes

Port-writes are not actually part of the RapidIO messaging specification, but are covered in the

Input/Output logical specification. However, in the PowerQUICCIII devices, port writes are processed by

the message unit and therefore will be covered in this document.

Using the Serial RapidIO Messaging Unit on PowerQUICC™ III, Rev. 0

Freescale Semiconductor 3

PowerQUICC III Serial RapidIO Messaging Unit

The maintenance port-write operation does not have guaranteed delivery and does not have an associated

response. This operation can be used for sending messages, such as error indicators or status information,

from a device that does not have an endpoint (for example, a switch). A port-write request to a queue that

is full or busy may be discarded.

Port-writes use the type 8 packet format.

3 PowerQUICC III Serial RapidIO Messaging Unit

The serial RapidIO messaging unit on PowerQUICC III is compliant with the message passing logical

specification.

The messaging unit can be examined as three separate entities: the data message controllers,

the doorbell message controller, and the inbound port-write controller. The following sections summarize

the details of the messaging unit. Full details can be found in the PowerQUICC III MPC9548 reference

manual.

3.1 Comparison with Parallel RapidIO Messaging Unit

Parallel and serial RapidIO are very similar, in terms of software, as the software has no direct control over

the RapidIO physical layer. However, there are a few notable differences between the operation of the

serial RapidIO messaging unit on the MPC8548 and the parallel RapidIO messaging unit on other

PowerQUICC III processors (such as MPC8540 and MPC8560). The serial RapidIO messaging unit

features two data message controllers, whereas the parallel RapidIO unit contains only one. Also, in the

parallel RapidIO implementation, doorbells are not transmitted through the messaging unit. In the serial

RapidIO implementation, doorbells are transmitted in a similar manner to the data messages. Refer to the

equivalent application note for the parallel RapidIO implementation for further detail.

3.2 Data Message Controllers

The MPC8548 features two data message controllers. Each of these data message controllers operates

independently, and all data message controller registers are duplicated.

The data message controllers provide support for up to 256 bytes for each message transaction (segment),

and up to 16 segments per message. This gives support for the maximum message size of 4 Kbytes set by

the RapidIO specifications.

Each data message controller can be examined in two parts: the outbox controller and the inbox controller.

3.2.1 Outbox Controller

The outbox controller is responsible for sending messages from local memory. The outbox controller

supports two modes of operation: direct and chaining modes.

In direct mode, messages must be sent one at a time. Software must first ensure that the message unit is

not busy with a previously initiated message, then program the outbox controller registers with the address,

size, and destination of the outgoing message. A 0-to-1 transition of the start bit in the mode register will

then cause the data message to be transmitted.

Using the Serial RapidIO Messaging Unit on PowerQUICC™ III, Rev. 0

4 Freescale Semiconductor

PowerQUICC III Serial RapidIO Messaging Unit

In chaining mode, the software must reserve an area of memory to store message descriptors. The address

of this memory is then passed to the outbox controller, which will access it as a circular queue.

When the software wishes to add a new message to the queue, it first ensures that the queue is not full, then

reads the address of the next available descriptor from the circular queue. The information regarding the

location, size, and destination of the outgoing message is then written into that descriptor. The software

must then set the increment bit in the outbound mode register to inform the queuing mechanism that this

descriptor should be added to the queue.

On completion of one outgoing message, the outbox controller will automatically start processing the next

descriptor in the queue until the queue is empty.

Multi-segment messages are transparent to the software. Messages with payload greater than 256 bytes

must be divided into segments to be transmitted across RapidIO. However, the outbox controller

automatically handles this segmentation and the software is not aware of (or able to control) it.

The outbox controller also supports the ability to multicast a single-segment 256-byte message to up to 32

different destination IDs. Please note that this is not related to the multicast extensions described in the

RapidIO specification.

The outbox can generate an interrupt, from five sources, which can be individually enabled.

• Queue overflow interrupt

• Queue full interrupt

• Queue empty interrupt

• End-of-message interrupt

• Error interrupt

3.2.2 Descriptor Format

In normal chaining mode, message descriptors are used to contain all the information relevant to an

outgoing message. The descriptor is added to the outbound queue, and as that descriptor is processed, the

information contained in it is transferred into the outbox registers. The format of the descriptor is shown

in Table 1.

Table 1. Outbound Message Unit Descriptor Summary

Offset Descriptor Field Description

0x00 Source extended

address

Contains the source address of message operations with local addresses greater than 32 bits.

After the message controller reads the descriptor from memory, this field is loaded into the

source extended address register.

0x04 Source address Contains the source address of the message operation and a snoop enable bit. After the

message controller reads the descriptor from memory, this field is loaded into the source

address register.

0x08 Destination port Contains the destination ID and mailbox of the message operation. After the message

controller reads the descriptor from memory, this field is loaded into the destination port

Using the Serial RapidIO Messaging Unit on PowerQUICC™ III, Rev. 0

Freescale Semiconductor 5

PowerQUICC III Serial RapidIO Messaging Unit

3.2.3 Multicast Mode

The data message units support a “multicast” mode, which is not related to the multicast mode described

in the multicast extensions to the RapidIO specification.

Rather, this mode permits users to efficiently

send the same data message to multiple endpoints in the system. This mode can only be used for

single-segment (up to 256-byte) data messages.

When multicast mode is enabled (multicast mode is a bit within the destination attributes word of the

descriptor, or in the destination attributes register), the message unit looks to two additional registers for

information regarding the destinations to which the data message should be sent. These registers are the

outbound message multicast group register (OMxMGR) and the outbound message multicast list register

(OMxMLR).

The multicast mode splits the destination IDs into groups of 32. For example, group 0 contains target

deviceIDs 0,1,..31, and group 1 contains target deviceIDs 32, 33,..63. Each multicast operation can

transmit to device IDs within a single group, and the OMxMGR determines which group is to be

addressed.

The multicast operation can transmit the data message to any number of the 32 deviceIDs within the

chosen group. The OMxMLR contains a single bit corresponding to each deviceID within a group and, if

that bit is set, the data messages will be sent to that DeviceID.

For example, if OMxMGR selects group 0, then bit 0 in the OMxMLR corresponds to deviceID 0, and bit

1 corresponds to deviceID 1. If OMxMGR selects group 1, then bit 0 in the OMxMLR corresponds to

deviceID 32, and bit 1 corresponds to deviceID 33. It is not valid to have none of the bits set. If OMxMGR

is set to 0x00000000, bit 0 is assumed to be set.

3.2.4 Inbox Controller

The inbox controllers are responsible for receiving incoming data messages and storing them in local

memory. In the MPC8548, all incoming data messages destined for mailbox 0 will be directed to the

inbound controller of message unit 0, and all incoming messages destined for mailbox 1,2 or 3 will be

directed to the inbound controller of message unit 1.

0x0C Destination

attributes

Contains transaction attributes of the message operation (that is, multicast mode,

end-of-message interrupt enable and priority). After the message controller reads the

descriptor from memory, this field is loaded into the destination attributes register.

0x10 Multicast group Contains the logical multicast group. Groups are defined as a list of 32 consecutive device IDs.

0x14 Multicast list Contains a bit vector list by device ID.

0x18 Double-word count Contains the number of double-words for the message operation. After the message

controller reads the descriptor from memory, this field is loaded into the double-word count

0x1C Reserved —

Table 1. Outbound Message Unit Descriptor Summary (continued)

Offset Descriptor Field Description

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