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S3C2440所有寄存器宏定义
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2011-03-31
23:38:30
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S3C2440所有寄存器宏定义,有了它方便,便写ARM程序就快多啦
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#ifndef __Jackarm_H
#define __Jackarm_H
/*************************硬件配置信息***********************************************/
//64MB
// 0x33ff4800 ~ 0x33ff7fff : FIQ ~ User Stack Area
// 0x33ff8000 ~ 0x33fffeff : Not Useed Area
// 0x33ffff00 ~ 0x33ffffff : Exception & ISR Vector Table
#define _RAM_STARTADDRESS 0x30000000
#define _ISR_STARTADDRESS 0x33ffff00
#define _STACK_BASEADDRESS 0x33ff8000
#define FIN (12000000) //hzh
#define BUSWIDTH (32) // BUSWIDTH : 16,32
/*************************定义基本数据类型**********************************************/
#define U32 unsigned int
#define U16 unsigned short
#define S32 int
#define S16 short int
#define U8 unsigned char
#define S8 char
#define TRUE 1
#define FALSE 0
#define OK 1
#define FAIL 0
/**************************定义2440寄存器地址***************************************************/
#ifdef __cplusplus
extern "C" {
#endif
// Memory control
#define __Jackarm_H
/*************************硬件配置信息***********************************************/
//64MB
// 0x33ff4800 ~ 0x33ff7fff : FIQ ~ User Stack Area
// 0x33ff8000 ~ 0x33fffeff : Not Useed Area
// 0x33ffff00 ~ 0x33ffffff : Exception & ISR Vector Table
#define _RAM_STARTADDRESS 0x30000000
#define _ISR_STARTADDRESS 0x33ffff00
#define _STACK_BASEADDRESS 0x33ff8000
#define FIN (12000000) //hzh
#define BUSWIDTH (32) // BUSWIDTH : 16,32
/*************************定义基本数据类型**********************************************/
#define U32 unsigned int
#define U16 unsigned short
#define S32 int
#define S16 short int
#define U8 unsigned char
#define S8 char
#define TRUE 1
#define FALSE 0
#define OK 1
#define FAIL 0
/**************************定义2440寄存器地址***************************************************/
#ifdef __cplusplus
extern "C" {
#endif
// Memory control
#define rBWSCON (*(volatile unsigned *)0x48000000) //Bus width & wait status
#define rBANKCON0 (*(volatile unsigned *)0x48000004) //Boot ROM control
#define rBANKCON1 (*(volatile unsigned *)0x48000008) //BANK1 control
#define rBANKCON2 (*(volatile unsigned *)0x4800000c) //BANK2 cControl
#define rBANKCON3 (*(volatile unsigned *)0x48000010) //BANK3 control
#define rBANKCON4 (*(volatile unsigned *)0x48000014) //BANK4 control
#define rBANKCON5 (*(volatile unsigned *)0x48000018) //BANK5 control
#define rBANKCON6 (*(volatile unsigned *)0x4800001c) //BANK6 control
#define rBANKCON7 (*(volatile unsigned *)0x48000020) //BANK7 control
#define rREFRESH (*(volatile unsigned *)0x48000024) //DRAM/SDRAM refresh
#define rBANKSIZE (*(volatile unsigned *)0x48000028) //Flexible Bank Size
#define rMRSRB6 (*(volatile unsigned *)0x4800002c) //Mode register set for SDRAM
#define rMRSRB7 (*(volatile unsigned *)0x48000030) //Mode register set for SDRAM
// USB Host
// INTERRUPT
#define rSRCPND (*(volatile unsigned *)0x4a000000) //Interrupt request status
#define rINTMOD (*(volatile unsigned *)0x4a000004) //Interrupt mode control
#define rINTMSK (*(volatile unsigned *)0x4a000008) //Interrupt mask control
#define rPRIORITY (*(volatile unsigned *)0x4a00000c) //IRQ priority control
#define rINTPND (*(volatile unsigned *)0x4a000010) //Interrupt request status
#define rINTOFFSET (*(volatile unsigned *)0x4a000014) //Interruot request source offset
#define rSUBSRCPND (*(volatile unsigned *)0x4a000018) //Sub source pending
#define rINTSUBMSK (*(volatile unsigned *)0x4a00001c) //Interrupt sub mask
// DMA
#define rDISRC0 (*(volatile unsigned *)0x4b000000) //DMA 0 Initial source
#define rDISRCC0 (*(volatile unsigned *)0x4b000004) //DMA 0 Initial source control
#define rDIDST0 (*(volatile unsigned *)0x4b000008) //DMA 0 Initial Destination
#define rBANKCON0 (*(volatile unsigned *)0x48000004) //Boot ROM control
#define rBANKCON1 (*(volatile unsigned *)0x48000008) //BANK1 control
#define rBANKCON2 (*(volatile unsigned *)0x4800000c) //BANK2 cControl
#define rBANKCON3 (*(volatile unsigned *)0x48000010) //BANK3 control
#define rBANKCON4 (*(volatile unsigned *)0x48000014) //BANK4 control
#define rBANKCON5 (*(volatile unsigned *)0x48000018) //BANK5 control
#define rBANKCON6 (*(volatile unsigned *)0x4800001c) //BANK6 control
#define rBANKCON7 (*(volatile unsigned *)0x48000020) //BANK7 control
#define rREFRESH (*(volatile unsigned *)0x48000024) //DRAM/SDRAM refresh
#define rBANKSIZE (*(volatile unsigned *)0x48000028) //Flexible Bank Size
#define rMRSRB6 (*(volatile unsigned *)0x4800002c) //Mode register set for SDRAM
#define rMRSRB7 (*(volatile unsigned *)0x48000030) //Mode register set for SDRAM
// USB Host
// INTERRUPT
#define rSRCPND (*(volatile unsigned *)0x4a000000) //Interrupt request status
#define rINTMOD (*(volatile unsigned *)0x4a000004) //Interrupt mode control
#define rINTMSK (*(volatile unsigned *)0x4a000008) //Interrupt mask control
#define rPRIORITY (*(volatile unsigned *)0x4a00000c) //IRQ priority control
#define rINTPND (*(volatile unsigned *)0x4a000010) //Interrupt request status
#define rINTOFFSET (*(volatile unsigned *)0x4a000014) //Interruot request source offset
#define rSUBSRCPND (*(volatile unsigned *)0x4a000018) //Sub source pending
#define rINTSUBMSK (*(volatile unsigned *)0x4a00001c) //Interrupt sub mask
// DMA
#define rDISRC0 (*(volatile unsigned *)0x4b000000) //DMA 0 Initial source
#define rDISRCC0 (*(volatile unsigned *)0x4b000004) //DMA 0 Initial source control
#define rDIDST0 (*(volatile unsigned *)0x4b000008) //DMA 0 Initial Destination
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