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NTP8835C【30W支持2.0/2.1声道音频功放芯片】
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NTP8835C【30W支持2.0/2.1声道音频功放芯片】
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Power Driver Integrated Full Digital Audio Amplifier NTP8835C
Copyright ⓒ NeoFidelity, Inc. Page 1
Document Number: NTP8835C Rev1.0 2021-04-27
NTP8835C
High Performance, High Fidelity Power
Driver Integrated Full Digital Audio Amplifier
Datasheet
ver. 1.0
Power Driver Integrated Full Digital Audio Amplifier NTP8835C
Copyright ⓒ NeoFidelity, Inc. Page 2
Document Number: NTP8835C Rev1.0 2021-04-27
General Description
The NTP8835C is a single chip full digital audio
amplifier including power stage for stereo amplifier
system. The NTP8835C is integrated with
versatile digital audio signal processing functions,
high-performance, high-fidelity fully digital PWM
modulator and two high-power full-bridge
MOSFET power stages.
The NTP8835C receives digital serial audio data
with sampling frequencies from 8kHz through
192kHz. It delivers 2 x 30 watts in the stereo
mode with a heat sink.
The NTP8835C has a mixer and Bi-Quad filters
which can be used to implement essential audio
signal processing functions such as compensation
of a loud speaker response and parametric
equalization.
All functions of the NTP8835C can be controlled
by internal register values via I
2
C host interface
bus.
Package
NTP8835C
VDD_PLL
GND
SDATA
WCK
BCK
SDA
SCL
DVDD
/FAULT
SW_STBY
VDD_IO
CLK_OUT
CLK_I
AD
/RESET
BST1A
PGND1A
OUT1A
PVDD1A
PVDD1B
SW_A
SW_B
HP_L
HP_R
HP_MUTE
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A
OUT1B
PGND1B
BST1B
VDR1
AGND
VDR2
BST2A
PGND2A
OUT2A
NC
30
29
21
22
23
24
25
26
27
28
1
2
10
9
8
7
6
5
4
3
11
12
20
19
18
17
16
15
14
13
40
39
31
32
33
34
35
36
37
38
( 40 pin SAW QFN 6mm x 6mm Package )
Features
⚫ 2 CH Stereo (30W x 2 BTL @24V, 4Ω)
⚫ 2.1CH (10W x 2 + 30W @24V, 4Ω)
⚫ SDATA Generator (I
2
S Output)
⚫ Wide Operating Supply Voltage Range
(5V to 28V)
⚫ Floating Point Operation
⚫ 25 Programmable Bi-Quad Filters
✓ Speaker Compensation
✓ LPF, HPF
✓ Parametric Equalizer
✓ Loudness Control
⚫ 100dB Dynamic Range
⚫ 2 Band Dynamic Range Control
⚫ 5 Band Graphic Equalizer
✓ 10 GEQs in User mode for LR
⚫ 3D Surround
⚫ Protection Circuit
✓ OCP(Over Current Protection)
✓ OTP(Over Temperature Protection)
✓ UVP(Under Voltage Protection)
⚫ High Efficiency
⚫ Asynchronous Sample Rate Conversion
⚫ DC cut filter
Applications
⚫ OLED/UHD/FHD TV or Monitor TV
⚫ Docking Station
⚫ Mini-Component Audio Solution
Ordering Information
Product ID Package Type Pin Size
NTP8835C SAW QFN 40 6 x 6mm
Contact information: http://
Disclaimer
NeoFidelity, Inc. subject to change without notice in the product described in this datasheet including circuits, software and ICs, described herein for
the purpose of improvement of design and performance. NeoFidelity, Inc. assumes no responsibilities and liabilities for the use of the product,
conveys no license under any patent or copyright, and makes no warranties that the product is free from patent or copyright infringement, unless
otherwise specified.
Power Driver Integrated Full Digital Audio Amplifier NTP8835C
Copyright ⓒ NeoFidelity, Inc. Page 3
Document Number: NTP8835C Rev1.0 2021-04-27
Table of Contents
1. BLOCK DIAGRAM ....................................................................................................................................................... 4
2. PIN ASSIGNMENTS ..................................................................................................................................................... 4
3. PIN DESCRIPTIONS .................................................................................................................................................... 5
4. CHARACTERISTICS AND SPECIFICATIONS ............................................................................................................ 6
4.1. Absolute Maximum Ratings .................................................................................................................................... 6
4.2. Recommended Operating Conditions .................................................................................................................... 6
4.3. DC Electrical Characteristics .................................................................................................................................. 6
4.4. PLL Input Parameters and External Filter Components ......................................................................................... 7
4.5. Performance Specification ...................................................................................................................................... 7
4.6.1 Switching Characteristics – I
2
C Control ................................................................................................................ 8
4.6.2 Switching Characteristics – Audio Interface .......................................................................................................... 8
5. I
2
C BUS OF NTP8835C ................................................................................................................................................ 9
5.1. General Description of I
2
C Bus ............................................................................................................................... 9
5.1.1. Writing Operation................................................................................................................................................. 9
5.1.2. Reading Operation ............................................................................................................................................ 11
5.2 I
2
C Glitch Filter ...................................................................................................................................................... 12
6. CLOCK, RESET & CONTROL ................................................................................................................................... 13
6.1. System Clock ....................................................................................................................................................... 13
6.2. Timing Sequence (recommend) ........................................................................................................................... 13
6.2.1. Power-Up & Initialization Sequence .................................................................................................................. 13
6.2.2. Power-Down Sequence ..................................................................................................................................... 13
6.3. Timing Sequence 2 (reference) ............................................................................................................................ 14
6.3.1. Power-Up & Initialization Sequence .................................................................................................................. 14
6.3.2. Power-Down Sequence ..................................................................................................................................... 14
6.4. Sound On/Off Sequence ...................................................................................................................................... 15
6.4.1. 2-channel Sound On/Off Sequence ................................................................................................................... 15
6.4.2. 2.1-channel Sound On/Off Sequence ................................................................................................................ 15
7. AUDIO INPUT ............................................................................................................................................................ 16
7.1. I
2
S and Serial Audio Interface ............................................................................................................................... 16
7.1.1. I
2
S Glitch Filter................................................................................................................................................... 16
7.2. SDATA Generator ................................................................................................................................................. 16
7.3. Asynchronous Sample Rate Conversion .............................................................................................................. 16
8. MIXER ........................................................................................................................................................................ 18
9. PRE-PROCESSING ................................................................................................................................................... 19
9.1. Pre Bi-Quad Filter Chain ...................................................................................................................................... 19
9.2. 3D Surround ......................................................................................................................................................... 19
9.3. Configurable Graphic Equalizer ............................................................................................................................ 20
9.4. Post Bi-Quad Filter Chain ..................................................................................................................................... 20
9.5. Loudness Control ................................................................................................................................................. 21
10. VOLUME & DYNAMIC RANGE CONTROL ............................................................................................................... 22
10.1. Master Volume Control ....................................................................................................................................... 22
10.2. Channel Volume Control..................................................................................................................................... 22
10.3. Master Volume Fine Control ............................................................................................................................... 22
10.4. Mute and Soft Volume Change ........................................................................................................................... 22
10.5. Auto Mute ........................................................................................................................................................... 22
10.6. Dynamic Range Control ..................................................................................................................................... 23
11. OUTPUT INTERFACE ................................................................................................................................................ 24
11.1. Output Configuration ........................................................................................................................................... 24
11.2. AM Interference Relief Mode .............................................................................................................................. 24
11.3. PWM Output Mapper .......................................................................................................................................... 24
11.4. Switching Output Mode ....................................................................................................................................... 24
11.5. Soft Start ............................................................................................................................................................. 25
12. TYPICAL APPLICATION SCHEMATICS (2 Channel) ............................................................................................... 26
13. TYPICAL APPLICATION SCHEMATICS (2.1 Channel) ............................................................................................ 27
14. TYPICAL APPLICATION SCHEMATICS (PBTL) ....................................................................................................... 28
15. APPENDIX ................................................................................................................................................................. 29
A. Configuration Register Summary ........................................................................................................................ 29
B. Configuration Register Value Reference ............................................................................................................. 46
C. Typical Characteristics Graph .............................................................................................................................. 51
D. Outline and Mechanical Data .............................................................................................................................. 67
Power Driver Integrated Full Digital Audio Amplifier NTP8835C
Copyright ⓒ NeoFidelity, Inc. Page 4
Document Number: NTP8835C Rev1.0 2021-04-27
1. BLOCK DIAGRAM
Digital
Audio
Interface
(I
2
S I/F)
MIXER PWM
PLL
Full Bridge
Power FET
Output
I2C
Interface
Control
Register
Protection
Logic
SDATA
BCK
L
R
L
SW
L
SW
OUT1A
OUT1B
/FAULT
OUT2B
OUT2A
FBQ/PBQ
3D
GEQ
DRC
Soft Mute
VOL
Regulator
Power
Meter
SW_STBY
R R
MONITOR /
SDATA_OUT
Head-phone/
Sub-Woofer
L
SW
R
SRC
L
R
(SRC → ASRC)
Figure 1. NTP8835C Block Diagram
2. PIN ASSIGNMENTS
Figure 2. NTP8835C Pin Assignments
NTP8835C
VDD_PLL
GND
SDATA
WCK
BCK
SDA
SCL
DVDD
/FAULT
SW_STBY
VDD_IO
CLK_OUT
CLK_I
AD
/RESET
BST1A
PGND1A
OUT1A
PVDD1A
PVDD1B
SW_A
SW_B
HP_L
HP_R
HP_MUTE
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A
OUT1B
PGND1B
BST1B
VDR1
AGND
VDR2
BST2A
PGND2A
OUT2A
NC
30
29
21
22
23
24
25
26
27
28
1
2
10
9
8
7
6
5
4
3
11
12
20
19
18
17
16
15
14
13
40
39
31
32
33
34
35
36
37
38
Power Driver Integrated Full Digital Audio Amplifier NTP8835C
Copyright ⓒ NeoFidelity, Inc. Page 5
Document Number: NTP8835C Rev1.0 2021-04-27
3. PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
1 VDD_PLL P Regulator output for PLL digital block, 1.2V
2 GND P This pin should be connected to Ground
3 SDATA I I
2
S serial data input
4 WCK I I
2
S word clock
5 BCK I I
2
S bit clock
6 SDA I/O I
2
C data
7 SCL I I
2
C clock
8 DVDD P Regulator output for Core block, 1.2V
9 /FAULT I Active low to reset internal power stage, Pull-up
10 SW_STBY O External power device standby control
11
SW_A /
MONITOR_0
O Sub-Woofer_A/Monitoring signal out from processor block
12
SW_B /
MONITOR_1
O Sub-Woofer_B/Monitoring signal out from processor block
13 HP_L O Left audio channel Headphone signal
14 HP_R O Right audio channel Headphone signal
15 HP_MUTE O External Headphone mute signal
16 BST2B P Bootstrap supply, external capacitor to OUT2B is required
17 PGND2B P Ground
18 OUT2B O Power stage PWM output 2B
19 PVDD2B P Power supply for PWM Power stage 2B
20 PVDD2A P Power supply for PWM Power stage 2A
21 OUT2A O Power stage PWM output 2A
22 PGND2A P Ground
23 BST2A P Bootstrap supply, external capacitor to OUT2A is required
24 VDR2 P Gate drive voltage regulator decoupling pin, capacitor to GND is required
25 AGND P Ground
26 NC - No connection
27 VDR1 P Gate drive voltage regulator decoupling pin, capacitor to GND is required
28 BST1B P Bootstrap supply, external capacitor to OUT1B is required
29 PGND1B P Ground
30 OUT1B O Power stage PWM output 1B
31 PVDD1B P Power supply for PWM Power stage 1B
32 PVDD1A P Power supply for PWM Power stage 1A
33 OUT1A O Power stage PWM output 1A
34 PGND1A P Ground
35 BST1A P Bootstrap supply, external capacitor to OUT1A is required
36 /RESET I Active low to reset NTP8835C, Schmitt trigger input
37 AD I
I
2
C device address selection
38 CLK_I I System master clock input
39 CLK_OUT O System master clock output
40 VDD_IO P Power supply for digital interface I/O, 3.3V
- Thermal Pad P This pad should be connected to Ground
P = Power Supply or Ground, I = Input, O = Output, I/O = Input / Output
Table 1. NTP8835C Pin Description
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