TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
CONFIDENTIAL
User Manual (Volume 2) 1-1 V1.0 D15, 2013-07
NDA Required
Preface 1
Instruction Set Information 1
Instruction Syntax 1
Operand Definitions 1
Instruction Mnemonic 1
Operation Modifiers 2
Data Type Modifiers 3
Opcode Formats 3
16-bit Opcode Formats 3
32-bit Opcode Formats 4
Opcode Field Definitions 5
Instruction Operation Syntax 6
RTL Functions 8
Cache RTL Functions 9
Floating Point Operation Syntax 11
Coprocessor Instructions 13
PSW Status Flags (User Status Bits) 14
List of OS and I/O Privileged Instructions 14
Instruction Set Overview 1
Integer Arithmetic 1
Move 1
Addition and Subtraction 1
Multiply and Multiply-Add 2
Division 2
Absolute Value, Absolute Difference 2
Min, Max, Saturate 2
Conditional Arithmetic Instructions 2
Logical 3
Count Leading Zeros, Ones and Signs 3
Shift 4
Bit-Field Extract and Insert 4
Packed Arithmetic 6
PSW (Program Status Word) Status Flags and
Arithmetic Instructions 8
Usage 8
Saturation 8
DSP Arithmetic 8
Scaling 8
Special Case: -1 * -1 9
Guard Bits 9
Rounding 9
Overflow and Saturation 9
Sticky Advance Overflow and Block Scaling if
FFT 9
Multiply and MAC 9
Packed Multiply and Packed MAC 10
Compare Instructions 11
Simple Compare 11
Accumulating Compare 11
Compare with Shift 12
Packed Compare 12
Bit Operations 13
Simple Bit Operations 13
Accumulating Bit Operations 14
Shifting Bit Operations 14
Address Arithmetic 15
Address Comparison 15
Branch Instructions 16
Unconditional Branch 16
Conditional Branch 17
Loop Instructions 18
Load and Store Instructions 19
Load/Store Basic Data Types 19
Load Bit 20
Store Bit and Bit Field 20
Context Related Instructions 21
Lower Context Saving and Restoring 21
Context Loading and Storing 21
System Instructions 22
System Call 22
Synchronization Primitives (DYSNC and ISYNC)
22
Access to the Core Special Function Registers
(CSFRs) 23
Enabling and Disabling the Interrupt System 23
Return (RET) and Return From Exception (RFE)
Instructions 24
Trap Instructions 24
No-Operation (NOP) 24
Coprocessor (COP) Instructions 24
16-bit Instructions 24
Instruction Set 1
CPU Instructions 1
FPU Instructions 411
MMU Instructions 434
MULTITHREAD Instructions 441
PSEUDO Instructions 443
LS and IP Instruction Summary Lists 445
List of LS Instructions 445
List of IP Instructions 447
List of Instructions by Shortname 1
List of Instructions by Longname 5
TriCore Architecture Manual Vol2 downloaded by Petter Bergman (Autoliv Sverige AB) at 15 Sep 2016 08:20