/* Copyright (C) 2003, 2004 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* As a special exception, if you include this header file into source
files compiled by GCC, this header file does not by itself cause
the resulting executable to be covered by the GNU General Public
License. This exception does not however invalidate any other
reasons why the executable file might be covered by the GNU General
Public License. */
/* Implemented from the specification included in the Intel C++ Compiler
User Guide and Reference, version 8.0. */
#ifndef _EMMINTRIN_H_INCLUDED
#define _EMMINTRIN_H_INCLUDED
#ifdef __SSE2__
#include <xmmintrin.h>
/* SSE2 */
typedef double __v2df __attribute__ ((mode (V2DF)));
typedef int __v2di __attribute__ ((mode (V2DI)));
typedef int __v4si __attribute__ ((mode (V4SI)));
typedef int __v8hi __attribute__ ((mode (V8HI)));
typedef int __v16qi __attribute__ ((mode (V16QI)));
/* Create a selector for use with the SHUFPD instruction. */
#define _MM_SHUFFLE2(fp1,fp0) \
(((fp1) << 1) | (fp0))
#define __m128i __v2di
#define __m128d __v2df
/* Create a vector with element 0 as *P and the rest zero. */
static __inline __m128d
_mm_load_sd (double const *__P)
{
return (__m128d) __builtin_ia32_loadsd (__P);
}
/* Create a vector with all two elements equal to *P. */
static __inline __m128d
_mm_load1_pd (double const *__P)
{
__v2df __tmp = __builtin_ia32_loadsd (__P);
return (__m128d) __builtin_ia32_shufpd (__tmp, __tmp, _MM_SHUFFLE2 (0,0));
}
static __inline __m128d
_mm_load_pd1 (double const *__P)
{
return _mm_load1_pd (__P);
}
/* Load two DPFP values from P. The address must be 16-byte aligned. */
static __inline __m128d
_mm_load_pd (double const *__P)
{
return (__m128d) __builtin_ia32_loadapd (__P);
}
/* Load two DPFP values from P. The address need not be 16-byte aligned. */
static __inline __m128d
_mm_loadu_pd (double const *__P)
{
return (__m128d) __builtin_ia32_loadupd (__P);
}
/* Load two DPFP values in reverse order. The address must be aligned. */
static __inline __m128d
_mm_loadr_pd (double const *__P)
{
__v2df __tmp = __builtin_ia32_loadapd (__P);
return (__m128d) __builtin_ia32_shufpd (__tmp, __tmp, _MM_SHUFFLE2 (0,1));
}
/* Create a vector with element 0 as F and the rest zero. */
static __inline __m128d
_mm_set_sd (double __F)
{
return (__m128d) __builtin_ia32_loadsd (&__F);
}
/* Create a vector with all two elements equal to F. */
static __inline __m128d
_mm_set1_pd (double __F)
{
__v2df __tmp = __builtin_ia32_loadsd (&__F);
return (__m128d) __builtin_ia32_shufpd (__tmp, __tmp, _MM_SHUFFLE2 (0,0));
}
static __inline __m128d
_mm_set_pd1 (double __F)
{
return _mm_set1_pd (__F);
}
/* Create the vector [Z Y]. */
static __inline __m128d
_mm_set_pd (double __Z, double __Y)
{
return (__v2df) {__Y, __Z};
}
/* Create the vector [Y Z]. */
static __inline __m128d
_mm_setr_pd (double __Z, double __Y)
{
return _mm_set_pd (__Y, __Z);
}
/* Create a vector of zeros. */
static __inline __m128d
_mm_setzero_pd (void)
{
return (__m128d) __builtin_ia32_setzeropd ();
}
/* Stores the lower DPFP value. */
static __inline void
_mm_store_sd (double *__P, __m128d __A)
{
__builtin_ia32_storesd (__P, (__v2df)__A);
}
/* Store the lower DPFP value across two words. */
static __inline void
_mm_store1_pd (double *__P, __m128d __A)
{
__v2df __va = (__v2df)__A;
__v2df __tmp = __builtin_ia32_shufpd (__va, __va, _MM_SHUFFLE2 (0,0));
__builtin_ia32_storeapd (__P, __tmp);
}
static __inline void
_mm_store_pd1 (double *__P, __m128d __A)
{
_mm_store1_pd (__P, __A);
}
/* Store two DPFP values. The address must be 16-byte aligned. */
static __inline void
_mm_store_pd (double *__P, __m128d __A)
{
__builtin_ia32_storeapd (__P, (__v2df)__A);
}
/* Store two DPFP values. The address need not be 16-byte aligned. */
static __inline void
_mm_storeu_pd (double *__P, __m128d __A)
{
__builtin_ia32_storeupd (__P, (__v2df)__A);
}
/* Store two DPFP values in reverse order. The address must be aligned. */
static __inline void
_mm_storer_pd (double *__P, __m128d __A)
{
__v2df __va = (__v2df)__A;
__v2df __tmp = __builtin_ia32_shufpd (__va, __va, _MM_SHUFFLE2 (0,1));
__builtin_ia32_storeapd (__P, __tmp);
}
/* Sets the low DPFP value of A from the low value of B. */
static __inline __m128d
_mm_move_sd (__m128d __A, __m128d __B)
{
return (__m128d) __builtin_ia32_movsd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_add_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_addpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_add_sd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_addsd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_sub_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_subpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_sub_sd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_subsd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_mul_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_mulpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_mul_sd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_mulsd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_div_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_divpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_div_sd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_divsd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_sqrt_pd (__m128d __A)
{
return (__m128d)__builtin_ia32_sqrtpd ((__v2df)__A);
}
/* Return pair {sqrt (A[0), B[1]}. */
static __inline __m128d
_mm_sqrt_sd (__m128d __A, __m128d __B)
{
__v2df __tmp = __builtin_ia32_movsd ((__v2df)__A, (__v2df)__B);
return (__m128d)__builtin_ia32_sqrtsd ((__v2df)__tmp);
}
static __inline __m128d
_mm_min_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_minpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_min_sd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_minsd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_max_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_maxpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_max_sd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_maxsd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_and_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_andpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_andnot_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_andnpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_or_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_orpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_xor_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_xorpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_cmpeq_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_cmpeqpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_cmplt_pd (__m128d __A, __m128d __B)
{
return (__m128d)__builtin_ia32_cmpltpd ((__v2df)__A, (__v2df)__B);
}
static __inline __m128d
_mm_cmple_pd (__m128d __A, __m128d __B)
{
ret
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