CW6693F
Bluetooth Multimedia SoC
User Manual
[CW6693F-UM-120-EN]
Versions: 1.2.0
Release Date: 2018-10-24
Table of content I
CW6693F Bluetooth Multimedia SOC Version 1.2.0
Copyright © 2018, www.appotech.com. All Rights Reserved.
Table of content
1 Product Overview .............................................................................................................................. 1
1.1 Outline ........................................................................................................................................ 1
1.2 Features ...................................................................................................................................... 1
1.3 System Architecture ................................................................................................................... 3
2 Pin Definitions ................................................................................................................................... 4
2.1 CW6693F .................................................................................................................................... 4
2.1.1 Pin Assignment ................................................................................................................... 4
2.1.2 Pin Description .................................................................................................................... 4
3 CPU Core Information ....................................................................................................................... 9
3.1 Architecture ............................................................................................................................... 9
3.2 Instruction Set ............................................................................................................................ 9
3.3 Memory Mapping .................................................................................................................... 12
3.3.1 Memory Organizations ..................................................................................................... 12
3.3.2 Internal Data Memory Mapping ....................................................................................... 14
3.4 Interrupt Processing ................................................................................................................. 14
3.4.1 Interrupt sources .............................................................................................................. 14
3.4.2 Interrupt Priority............................................................................................................... 16
3.4.3 Breakpoint interrupt (ROM Code Patch) .......................................................................... 17
3.4.4 External interrupt guide ................................................................................................... 17
3.4.5 Special Function Register Mapping (SFR) ......................................................................... 17
3.5 CPU and Memory related SFR Description .............................................................................. 18
4 Power Management ........................................................................................................................ 27
4.1 Clock Strategy ........................................................................................................................... 27
4.1.1 Clock Generator Unit ........................................................................................................ 27
4.1.2 Audio PLL .......................................................................................................................... 40
4.2 Low Power and Power Management ....................................................................................... 41
4.2.1 Sleep mode ....................................................................................................................... 41
4.2.2 IDLE Mode ........................................................................................................................ 41
II Table of content
CW6693F Bluetooth Multimedia SOC Version 1.2.0
Copyright © 2018, www.appotech.com. All Rights Reserved.
4.2.3 Power down Mode ........................................................................................................... 41
4.3 LVD ........................................................................................................................................... 42
5 External Special Function Registers (XSFR) ..................................................................................... 44
6 Timer ............................................................................................................................................... 73
6.1 Timer0 ...................................................................................................................................... 73
6.1.1 Timer0 Special Function Registers: ................................................................................... 73
6.2 Timer1/2/3/4............................................................................................................................ 75
6.2.1 Special Function Registers ................................................................................................ 77
6.3 Timer5/6 ................................................................................................................................... 82
6.3.1 Special Function Registers ................................................................................................ 83
6.4 Timer7/8 ................................................................................................................................... 86
6.4.1 Special Function Registers ................................................................................................ 87
6.5 Independent Power Real Time Clock Counter ......................................................................... 88
6.5.1 IRTCC Controller ............................................................................................................... 88
6.5.2 IRTCC Timer ...................................................................................................................... 88
6.5.3 IRTCC Wakeup .................................................................................................................. 88
6.5.4 Communication with IRTCC Timer .................................................................................... 89
6.5.5 IRTCC Special Function Registers ...................................................................................... 91
6.5.6 IRTCC Components Description ........................................................................................ 93
6.5.7 IRTCC Operating Guide ..................................................................................................... 98
7 UART .............................................................................................................................................. 105
7.1 UART0 ..................................................................................................................................... 105
7.2 UART1 ..................................................................................................................................... 107
7.3 UART2/3 ................................................................................................................................. 116
7.3.1 UART2/3 Special Function Registers............................................................................... 116
8 Reset Generation Unit ................................................................................................................... 122
8.1 Power-on Reset (POR) ............................................................................................................ 122
8.2 System Reset .......................................................................................................................... 122
8.2.1 Reset Source ................................................................................................................... 123
Table of content III
CW6693F Bluetooth Multimedia SOC Version 1.2.0
Copyright © 2018, www.appotech.com. All Rights Reserved.
9 SPI .................................................................................................................................................. 124
9.1 SPI0 ......................................................................................................................................... 124
9.1.1 SPI0 Special Function Registers ...................................................................................... 125
9.1.2 SPI0 Operation Guide ..................................................................................................... 126
9.2 SPI1 ......................................................................................................................................... 127
9.2.1 SPI1 Operation Guide ..................................................................................................... 129
9.3 SPI2 ......................................................................................................................................... 130
9.3.1 SPI2 Special Function Registers ...................................................................................... 131
9.3.2 SPI2 Operation Guide ..................................................................................................... 133
10 SARADC .......................................................................................................................................... 135
10.1 Features .................................................................................................................................. 135
10.2 ADC Pin Mapping.................................................................................................................... 135
10.3 SARADC Special Function Registers........................................................................................ 135
11 IR receiver ...................................................................................................................................... 138
11.1 IO Mapping ............................................................................................................................. 138
11.2 IR frame format ...................................................................................................................... 138
11.3 IR Receiver Control Registers ................................................................................................. 139
11.4 IR Receiver Operation Guide .................................................................................................. 142
12 General Purpose Input/Output (GPIO) .......................................................................................... 143
12.1 Overview ................................................................................................................................ 143
12.2 Function Register ................................................................................................................... 143
13 Integrated Interchip Sound (IIS) .................................................................................................... 151
13.1 Features .................................................................................................................................. 151
13.2 IIS Special Function Register .................................................................................................. 151
13.3 Operation Guide ..................................................................................................................... 157
13.3.1 CPU rd/wr ....................................................................................................................... 157
13.3.2 loop ................................................................................................................................. 158
13.3.3 DMA mode ...................................................................................................................... 158
14 Audio Terminal (DAC) .................................................................................................................... 159
