没有合适的资源?快使用搜索试试~ 我知道了~
verilog可用的FSDB dump命令
2 下载量 159 浏览量
2024-02-18
10:43:32
上传
评论
收藏 559KB PDF 举报
温馨提示
试读
134页
verilog可用的FSDB dump命令
资源推荐
资源详情
资源评论
Linking Novas Files with
Simulators and Enabling
FSDB Dumping
Novas Verification Enhancement Solutions
(2010.04)
SpringSoft, Inc.
Hsinchu, Taiwan and San Jose, CA
www.springsoft.com
Printing
Printed on April 14, 2010.
Version
This manual supports the Verdi
TM
Automated Debug System 2010.04 and
Siloti
TM
Visibility Automation System 2010.04 and higher versions. You should
use the documentation from the version of the installed software you are
currently using.
Copyright
All rights reserved. No part of this manual may be reproduced in any form or by
any means without written permission of SpringSoft, Inc.:
No. 25, Industry East Road IV
Science-Based Industrial Park
Hsinchu 300, Taiwan, R.O.C.
or
2025 Gateway Place, Suite 400,
San Jose, CA 95110
www.springsoft.com
Copyright (c) 1996-2010 SpringSoft, Inc.
Trademarks
Debussy, Verdi, nTrace, nSchema, nState, nWave, Temporal Flow View,
nCompare, nECO, nAnalyzer, and Active Annotation are trademarks or
registered trademarks of Springsoft USA, Inc. or Springsoft, Inc. in the United
States and other countries.
The product names used in this manual are the trademarks or registered
trademarks of their respective owners.
Confidentiality
The information in this document is confidential and is covered by a license
agreement between SpringSoft and your organization. Distribution and
disclosure are restricted.
Restricted Rights
The information contained in this document is subject to change without notice.
Contents
Linking Novas Files with Simulators and Enabling FSDB Dumping i
Contents
About This Book 1
Purpose ...............................................................................................................1
Audience.............................................................................................................1
Book Organization..............................................................................................2
Conventions Used in This Book.........................................................................3
Related Publications ...........................................................................................4
How to Reach SpringSoft Inc.............................................................................5
Overview 7
FSDB Format......................................................................................................7
FSDB Related Environment Variables...............................................................7
Novas Object File Cross Reference Matrix........................................................8
Subdirectory and Platform Mapping.............................................................9
FSDB Dumping Commands 11
FSDB Command Line, Environment Variable and Dump Command Options11
Mapping Command Line, Environment Variable and Dumping Command
Options ........................................................................................................12
FSDB Dumping Command Line Options...................................................16
FSDB Dumping Commands Used with Verilog ..............................................19
Supported Simulators for FSDB Dumping Commands..............................19
General Dumping Commands.....................................................................20
Limit FSDB Size.........................................................................................36
Memory/MDA Dumping Command...........................................................44
Assertion Dumping Command....................................................................47
Siloti Dumping Commands.........................................................................50
FSDB Dumping Commands Used in VHDL....................................................59
Supported Simulators for VHDL FSDB Dumping Commands..................59
General Dumping Commands.....................................................................60
Linking with Cadence Simulators 87
IUS (6.2 or Later Versions) - Verilog Only......................................................87
Quick Start Steps.........................................................................................87
Dynamic Linking ........................................................................................89
Dynamic Loading........................................................................................91
Contents
ii Linking Novas Files with Simulators and Enabling FSDB Dumping
IUS (IUS6.2 and Later Versions) - Verilog, VHDL or Mixed.........................94
Dynamic Linking ........................................................................................94
Dynamic Loading........................................................................................97
Calling CFC Functions from the ncsim Prompt........................................100
Linking with ModelSim Simulators 103
ModelSim (6.4 or Later Versions) - Verilog Only .........................................103
Specify Shared Library Search Path .........................................................103
Load the FSDB Dumper............................................................................104
Linking with Other Applications ..............................................................104
ModelSim (SE 6.4 or Later Versions) - VHDL or Mixed Only.....................106
Specify Shared Library Search Path .........................................................106
Compile and Include Novas FSDB Dumping Commands........................106
Load the FSDB Dumper............................................................................108
Linking with Synopsys Simulators 111
VCS (2006.06 or Later Versions)...................................................................111
Link with the Version-specific Novas Object Files ..................................111
Link with Other PLI Programs..................................................................113
VCS-MX.........................................................................................................114
Analyze and Include the Novas Package ..................................................115
Link the FSDB Dumper for FSDB Dumping Commands ........................116
Set the FSDB Dumper Library Path..........................................................116
Load the FSDB Dumper............................................................................116
Linking for Replay Simulation 121
Linking with Cadence Simulators ..................................................................121
Linking with ModelTech Simulators..............................................................123
Linking with Synopsys Simulators.................................................................124
Appendix: Third Party Integration 125
Linking with Cadence Simulators (IUS 6.2 or Later Versions) .....................125
Verilog Only..............................................................................................125
VHDL Only...............................................................................................127
Mixed Verilog/VHDL...............................................................................127
Linking with Synopsys VCS Simulators (VCS 2006.06 or Later Versions)..128
Using the Stackable -P Option for Specifying Multiple Libraries............128
Linking with ModelSim Simulators (6.4 or Later Versions)..........................129
Build a New Shared Library to Include Other Applications.....................129
Purpose
Linking Novas Files with Simulators and Enabling FSDB Dumping 1
About This Book
Purpose
This book explains how to link Novas object files for FSDB dumping with
various standard simulators. The manual should be read from beginning to end,
although you may skip any sections with which you are already familiar.
For detailed descriptions of commands for the Verdi system, please refer to the
appropriate chapter of the Verdi Command Reference Manual.
Audience
The audience for this manual includes engineers who are familiar with languages
and tools used in design and verification such as Verilog, VHDL, SystemVerilog,
and typically install, set-up and run simulators.
This document assumes that you have a basic knowledge of the platform on
which your version of the Verdi system runs: Unix or Linux, and that you are
knowledgeable in design and verification languages, simulation software, and
digital logic design.
剩余133页未读,继续阅读
资源评论
hemlok
- 粉丝: 97
- 资源: 1
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功