ucos移植到powerpc5554代码

This is release 1.11 of the MPC5553, MPC5554, MPC5533, MPC5534, MPC5561, MPC5565, MPC5566 and MPC5567 header files. ============================================================================== This package is intended to assist in writing programs for the mpc5553/4 mpc5533/4 and mpc5561/5/6/7 It consists of 8 header files: mpc5553.h, mpc5554.h, mpc5533.h, mpc5534.h, mpc5561.h, mpc5565.h, mpc5566.h, mpc5567.h plus a file that defines standard types typedefs.h and a file which defines the CPU SPR registers. Also included are integration specific vars files. These define variables used by the eTPU APIs The mpc5554.h defines all of the registers and bit fields in the mpc5554 device. The mpc5553.h defines all of the registers and bit fields in the mpc5553 device. The mpc5533.h defines all of the registers and bit fields in the mpc5533 device. The mpc5534.h defines all of the registers and bit fields in the mpc5534 device. The mpc5561.h defines all of the registers and bit fields in the mpc5561 device. The mpc5565.h defines all of the registers and bit fields in the mpc5565 device. The mpc5566.h defines all of the registers and bit fields in the mpc5566 device. The mpc5567.h defines all of the registers and bit fields in the mpc5567 device. The bit fields should be used carefully. Generally bit fields should only be used when you want to read or write to a single bit field in a register. If you want to access multiple bit fields in a register then an access to the complete register should be used. If you use the bit field to write to multiple bit field in a register then each access with be done as a separate operation because generally the registers are declared as violate. This could cause the code generate to be larger than if the complete register was accessed. This release contains: mpc5533.h version 1.7 mpc5534.h version 1.6 mpc5553.h version 1.8 mpc5554.h version 1.7 mpc5561.h version 1.1 mpc5565.h version 1.5 mpc5566.h version 1.4 mpc5567.h version 1.5 mpc5533_vars.h version 1.1 mpc5534_vars.h version 1.1 mpc5553_vars.h version 1.1 mpc5554_vars.h version 1.1 mpc5561_vars.h version 1.1 mpc5565_vars.h version 1.1 mpc5566_vars.h version 1.1 mpc5567_vars.h version 1.1 mpc5500_spr.h version 1.5 typedefs.h version 1.4 readme.txt this file. History ------- Changes in 1.11 ---------------- SRAM size modified from 64k to 80K for MPC5565 & MPC5567 RevA. If using Rev 0 silicon SRAM size can be changed back to 64K. Rev A (80K) #define SRAM_START 0x40000000 #define SRAM_SIZE 0x14000 #define SRAM_END 0x40013FFF Rev 0 (64K) #define SRAM_START 0x40000000 #define SRAM_SIZE 0x10000 #define SRAM_END 0x4000FFFF Changes in 1.10 ---------------- Added support for mpc5561. PDI - Created module.h file for PDI module FLEXRAY - MBSSUTR, MBIVEC, MBIDX & RSBIR bit field sizes updated. RSBIR, SELEC changed to SEL & RFRFCFR, FNUM changed to SEL to align with documentation. XBAR - MPR5 & SGCPR5 added for PDI. SIU - ENGDIV bit field size modified. eDMA - Updates to TCD's and the following registers: CR, ESR, SERQR, CERQR, SEEIR, CEEIR, CIRQR, CER, SSBR, CDSBR. HRSH/L Registers added. INTC, correction to the number of PSR registers. Various register/ bitfield updates tocorrect errors (MCR, TMODE bit removed. PADR register removed. PIER1, DRDIE bit removed & PIFR1, DRDIF removed. PCR1, Filter bypass bit removed). TCD: There are 4 possible configurations for the eDMA TCD�s. The Header file defaults to a �standard� set up which assumes: No channel to channel linking, i.e. citer.e_link & biter.e_link = 0 and minor loop mapping is also disabled, i.e EMLM in the DMA Control Register = 0. In addition the header files also contain alternate formats: EDMA_TCD_alt1_t which assumes, Channel to channel linking is enabled, i.e. citer.e_link & biter.e_link = 1 and minor loop mapping is still disabled, i.e EMLM in the DMA Control Register = 0. EDMA_TCD_alt2_t which assumes, Channel to channel linking is disabled, i.e. citer.e_link & biter.e_link = 0 however minor loop mapping is enabled, i.e EMLM in the DMA Control Register = 1. These files can be modified manually if you require further changes to your eDMA TCD format. Changes in 1.9 ---------------- Added support for mpc5566. FlexCAN - Changed bit name from BCC to MBFEN to reflect manual. FlexCAN: Added the following bits : MCR bits WRNEN & SRXDIS, CR Bits TWRNMSK & RWRNMSK and ESR Bits TWRNINT & RWRNINT added for MPC5533/34 and MPC556x (These bits are not present on Pre Rev A MPC5533/34). FlexCAN: Removed CAN_E for MPC5566. SPR: Added L1CSR0[WAM] & L1CSR0[CORG], L1SCR0[DPP] changed to DPB to align with documentation. mpc5533/4. FLASH: MCR[PRD] bit added, BIUCR2 Register added, BIUCR_DPFEN & IPFEN updated. Changes in 1.8 ---------------- Fix error in Flexcan BCC field for mpc5565/7. Change __GHS__ to __ghs__ in typedefs.h Changes in 1.7 ---------------- Added support for mpc5565 and mpc5567. For mpc5533/4 and mpc5553 header files: Fix typo in BIUPAR field width. Various changes to support new build methodology. This means that many of the reserved field widths are declared differently. Register postions did not change. Changes in 1.6 ---------------- Corrections to PBRIDGE MPCR/OPCAR/PACR registers. Affects mpc5554/53/33/34.h Changes in 1.5 ---------------- Added support for mpc5533 and mpc5534. Fixed issues with FEC offsets in mpc5553.h. Also added RMON_R_DROP register which was missing. Extended the PCR/GPDI/GPDO arrays to be as big as they can be (512/256/256) (MPC5533/4 uses PCRs 336,338,339,340/1/2 for CAL). Added M4PFE to BIUCR and M4AP to BIUAPR for MPC5553. Also included in MPC5533/4 Changes in 1.4 ---------------- Added EBI CAL support for MPC5553. Fixed address of FSBMCR. No changes for MPC5554. Changes in 1.3 ---------------- 1. Reverted to having seperate var files for mp5553/4. i.e mpc5553_vars.h and mpc5554_vars.h. Due to different amount of Dtaa RAM. 2. Removed mpc5500_vars.h from the release. 3. Fixed mpc5553.h so that it has FLEXCANB removed and FLEXCANC included. Changes in 1.2 ---------------- 1. Made mpc5500_spr.h the same as the version published in the config project on the extranet. Changes in 1.1 ---------------- 1. Prepended SPRs with "SPR_" in mpc5500_spr.h 2. Fixed copyright date in mpc5500_spr.h and mpc5500_vars.h Changes in 1.0 ---------------- 1. Added mpc5553.h 2. Renamed mpc5554_spr.h to mpc5500_spr.h 3. Renamed mpc5554_vars.h to mpc5500_vars.h Changes in 0.17 --------------- 1. Moved eTPU variable definitions to a seperate new file. 2. Removed SIU variable the GPIO routines do not need it. Changes in 0.16 --------------- 1. Fixed comments. Changes in 0.15 --------------- 1. Added support for new eTPU utilites routines. This required adding some variables to help define the eTPU module. 2. Updated the FlexCAN buffer ID field. The bit fields were defined. This may cause some compatibility problems because the ID field is now ID.R. Changes in 0.14 --------------- 1. All files updated for CVS version control and checked into repository. 2. Added ETPU_CODE_RAM definition. 3. Updated copyright from Motorola to Freescale. 4. Added new SCMOFFDATAR register to eTPU. 5. Fixed REDCR_A&B bit fields in eTPU. 6. Added new DBR bit in CTAR register for DSPI modules. 7. Included new mpc5554_spr.h file. 8. typedefs.h updated only for CVS no code changes. Changes in 0.13 --------------- 1. Fixed size of TIMER register in FlexCAN (was 16 now 32 bit). 2. Changed names of eTPU memory defines to start with ETPU so they do not get confused with the main cores memory Changes in 0.12 --------------- 1. Changed SERQR CERQR SEEIR CEEIR CIRQR CER