GXLife-Android--Double-imx-mkimage

/* * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017-2018 NXP * * SPDX-License-Identifier: GPL-2.0+ * derived from u-boot's mkimage utility * */ #ifdef _MSC_VER #define _CRT_SECURE_NO_WARNINGS #endif #define _GNU_SOURCE #include <stdio.h> #include <string.h> #include <stdlib.h> #include <stdint.h> #include <stddef.h> #include <sys/stat.h> #include <getopt.h> #include <errno.h> #include <fcntl.h> #include <unistd.h> #include <sys/mman.h> #include <sys/types.h> #include <zlib.h> #ifndef O_BINARY #define O_BINARY 0 #endif #undef offsetof #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) typedef struct { uint32_t addr; uint32_t value; } dcd_addr_data_t; typedef struct { uint8_t tag; uint16_t length; uint8_t version; } __attribute__((packed)) ivt_header_t; typedef struct { uint8_t tag; uint16_t length; uint8_t param; } __attribute__((packed)) write_dcd_command_t; #define MAX_HW_CFG_SIZE_V2 1017 struct dcd_v2_cmd { write_dcd_command_t write_dcd_command; /*4*/ dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2]; /*8136*/ } __attribute__((packed)); typedef struct { ivt_header_t header; struct dcd_v2_cmd dcd_cmd; uint32_t padding[1]; /* end up on an 8-byte boundary */ } dcd_v2_t; typedef struct { uint32_t start; uint32_t size; uint32_t plugin; uint32_t padding[1]; } boot_data_t; typedef struct { ivt_header_t header; uint32_t entry; uint32_t reserved1; uint32_t dcd_ptr; uint32_t boot_data_ptr; uint32_t self; uint32_t csf; uint32_t reserved2; } flash_header_v2_t; typedef struct { flash_header_v2_t fhdr; boot_data_t boot_data; uint32_t alignment[4]; } imx_header_v2_t; #define IH_MAGIC 0x27051956 /* Image Magic Number */ #define IH_NMLEN 32 /* Image Name Length */ typedef struct uimage_header { uint32_t ih_magic; /* Image Header Magic Number */ uint32_t ih_hcrc; /* Image Header CRC Checksum */ uint32_t ih_time; /* Image Creation Timestamp */ uint32_t ih_size; /* Image Data Size */ uint32_t ih_load; /* Data Load Address */ uint32_t ih_ep; /* Entry Point Address */ uint32_t ih_dcrc; /* Image Data CRC Checksum */ uint8_t ih_os; /* Operating System */ uint8_t ih_arch; /* CPU architecture */ uint8_t ih_type; /* Image Type */ uint8_t ih_comp; /* Compression Type */ uint8_t ih_name[IH_NMLEN]; /* Image Name */ } uimage_header_t; struct fdt_header { uint32_t magic; /* magic word FDT_MAGIC */ uint32_t totalsize; /* total size of DT block */ uint32_t off_dt_struct; /* offset to structure */ uint32_t off_dt_strings; /* offset to strings */ uint32_t off_mem_rsvmap; /* offset to memory reserve map */ uint32_t version; /* format version */ uint32_t last_comp_version; /* last compatible version */ /* version 2 fields below */ uint32_t boot_cpuid_phys; /* Which physical CPU id we're booting on */ /* version 3 fields below */ uint32_t size_dt_strings; /* size of the strings block */ /* version 17 fields below */ uint32_t size_dt_struct; /* size of the structure block */ }; /* Command tags and parameters */ #define HAB_DATA_WIDTH_BYTE 1 /* 8-bit value */ #define HAB_DATA_WIDTH_HALF 2 /* 16-bit value */ #define HAB_DATA_WIDTH_WORD 4 /* 32-bit value */ #define HAB_CMD_WRT_DAT_MSK 1 /* mask/value flag */ #define HAB_CMD_WRT_DAT_SET 2 /* set/clear flag */ #define HAB_CMD_CHK_DAT_SET 2 /* set/clear flag */ #define HAB_CMD_CHK_DAT_ANY 4 /* any/all flag */ #define HAB_CMD_WRT_DAT_FLAGS_WIDTH 5 /* flags field width */ #define HAB_CMD_WRT_DAT_FLAGS_SHIFT 3 /* flags field offset */ #define HAB_CMD_WRT_DAT_BYTES_WIDTH 3 /* bytes field width */ #define HAB_CMD_WRT_DAT_BYTES_SHIFT 0 /* bytes field offset */ #define IVT_HEADER_TAG 0xD1 #define IVT_VERSION 0x41 #define DCD_HEADER_TAG 0xD2 #define DCD_VERSION 0x41 #define DCD_WRITE_DATA_COMMAND_TAG 0xCC #define DCD_WRITE_DATA_PARAM (HAB_DATA_WIDTH_WORD << HAB_CMD_WRT_DAT_BYTES_SHIFT) /* 0x4 */ #define DCD_WRITE_CLR_BIT_PARAM ((HAB_CMD_WRT_DAT_MSK << HAB_CMD_WRT_DAT_FLAGS_SHIFT) | (HAB_DATA_WIDTH_WORD << HAB_CMD_WRT_DAT_BYTES_SHIFT)) /* 0xC */ #define DCD_WRITE_SET_BIT_PARAM ((HAB_CMD_WRT_DAT_MSK << HAB_CMD_WRT_DAT_FLAGS_SHIFT) | (HAB_CMD_WRT_DAT_SET << HAB_CMD_WRT_DAT_FLAGS_SHIFT) | (HAB_DATA_WIDTH_WORD << HAB_CMD_WRT_DAT_BYTES_SHIFT)) /* 0x1C */ #define DCD_CHECK_DATA_COMMAND_TAG 0xCF #define DCD_CHECK_BITS_CLR_PARAM (HAB_DATA_WIDTH_WORD << HAB_CMD_WRT_DAT_BYTES_SHIFT) /* 0x04 */ #define DCD_CHECK_BITS_SET_PARAM ((HAB_CMD_CHK_DAT_SET << HAB_CMD_WRT_DAT_FLAGS_SHIFT) | (HAB_DATA_WIDTH_WORD << HAB_CMD_WRT_DAT_BYTES_SHIFT)) /* 0x14 */ #define DCD_CHECK_ANY_BIT_CLR_PARAM ((HAB_CMD_CHK_DAT_ANY << HAB_CMD_WRT_DAT_FLAGS_SHIFT) | (HAB_DATA_WIDTH_WORD << HAB_CMD_WRT_DAT_BYTES_SHIFT)) /* 0x24 */ #define DCD_CHECK_ANY_BIT_SET_PARAM ((HAB_CMD_CHK_DAT_ANY << HAB_CMD_WRT_DAT_FLAGS_SHIFT) | (HAB_CMD_CHK_DAT_SET << HAB_CMD_WRT_DAT_FLAGS_SHIFT) | (HAB_DATA_WIDTH_WORD << HAB_CMD_WRT_DAT_BYTES_SHIFT)) /* 0x34 */ #define IVT_OFFSET_NAND (0x400) #define IVT_OFFSET_I2C (0x400) #define IVT_OFFSET_FLEXSPI (0x1000) #define IVT_OFFSET_SD (0x400) #define IVT_OFFSET_SATA (0x400) #define IMAGE_OFFSET_SD (0x8000) #define ROM_INITIAL_LOAD_SIZE (0x2000) #define CSF_DATA_SIZE (0x4000) #define INITIAL_LOAD_ADDR_SCU_ROM 0x3100e000 #define INITIAL_LOAD_ADDR_AP_ROM 0x00110000 #define INITIAL_LOAD_ADDR_FLEXSPI 0x08000000 #define IMG_AUTO_ALIGN 0x10 #define PLUGIN_IMAGE_FLAG_MASK (0x0001) /* bit 0 is plugin image indicator */ #define HDMI_IMAGE_FLAG_MASK (0x0002) /* bit 1 is HDMI image indicator */ #define HDMI_IVT_ID 0 #define PLUGIN_IVT_ID 1 #define IMAGE_IVT_ID 2 #define HDMI_FW_SIZE 0x17000 /* Use Last 0x1000 for IVT and CSF */ #define HDMI_FW_ADDR 0x32c10000 #define IH_OS_U_BOOT 17 #define IH_ARCH_ARM 2 #define IH_TYPE_FIRMWARE 5 #define IH_COMP_NONE 0 #define FDT_MAGIC 0xd00dfeed #define CSF_SIZE 0x2000 #define DEK_BLOB_MAX_SIZE 0x60 #define ROM_V1 1 #define ROM_V2 2 /* V2 ROM for iMX8MN */ #define ALIGN(x,a) __ALIGN_MASK((x),(__typeof__(x))(a)-1, a) #define __ALIGN_MASK(x,mask,mask2) (((x)+(mask))/(mask2)*(mask2)) #define uswap_16(x) \ ((((x) & 0xff00) >> 8) | \ (((x) & 0x00ff) << 8)) #define uswap_32(x) \ ((((x) & 0xff000000) >> 24) | \ (((x) & 0x00ff0000) >> 8) | \ (((x) & 0x0000ff00) << 8) | \ (((x) & 0x000000ff) << 24)) #define _uswap_64(x, sfx) \ ((((x) & 0xff00000000000000##sfx) >> 56) | \ (((x) & 0x00ff000000000000##sfx) >> 40) | \ (((x) & 0x0000ff0000000000##sfx) >> 24) | \ (((x) & 0x000000ff00000000##sfx) >> 8) | \ (((x) & 0x00000000ff000000##sfx) << 8) | \ (((x) & 0x0000000000ff0000##sfx) << 24) | \ (((x) & 0x000000000000ff00##sfx) << 40) | \ (((x) & 0x00000000000000ff##sfx) << 56)) #if defined(__GNUC__) # define uswap_64(x) _uswap_64(x, ull) #else #error # define uswap_64(x) _uswap_64(x, ) #endif #if __BYTE_ORDER == __LITTLE_ENDIAN # define cpu_to_le16(x) (x) # define cpu_to_le32(x) (x) # define cpu_to_le64(x) (x) # define le16_to_cpu(x) (x) # define le32_to_cpu(x) (x) # define le64_to_cpu(x) (x) # define cpu_to_be16(x) uswap_16(x) # define cpu_to_be32(x) uswap_32(x) # define cpu_to_be64(x) uswap_64(x) # define be16_to_cpu(x) uswap_16(x) # define be32_to_cpu(x) uswap_32(x) # define be64_to_cpu(x) uswap_64(x) #else #error # define cpu_to_le16(x) uswap_16(x) # define cpu_to_le32(x) uswap_32(x) # define cpu_to_le64(x) uswap_64(x) # define le16_to_cpu(x) uswap_16(x) # define le32_to_cpu(x) uswap_32(x) # define le64_to_cpu(x) uswap_64(x) # define cpu_to_be16(x) (x) # define cpu_to_be32(x) (x) # define cpu_to_be64(x) (x) # define be16_to_cpu(x) (x) # define be32_to_cpu(x) (x) # define be64_to_cpu(x) (x) #endif #define fdt32_to_cpu(x) be32_to_cpu(x) #define fdt_get_header(fdt, field) \ (fdt32_to_cpu(((const struct fdt_header *)(fdt))->field)) #define fdt_magic(fdt) (fdt_get_header(fdt, magic)) #define fdt_totalsize(fdt) (fdt_get_header(fdt, totalsize)) #define fdt_off