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Features

• Floating channel designed for bootstrap operation

Fully operational to +500V or +600V

Tolerant to negative transient voltage

dV/dt immune

• Gate drive supply range from 10 to 20V

• Undervoltage lockout for both channels

• 3.3V logic compatible

Separate logic supply range from 3.3V to 20V

Logic and power ground ±5V offset

• CMOS Schmitt-triggered inputs with pull-down

• Cycle by cycle edge-triggered shutdown logic

• Matched propagation delay for both channels

• Outputs in phase with inputs

Data Sheet No. PD60147 rev.

HIGH AND LOW SIDE DRIVER

Product Summary

500V max.

OFFSET

(IR2110)

(IR2113)

600V max.

+/- 2A / 2A

OUT

10 - 20V

on/off

(typ.) 120 & 94 ns

Delay Matching (IR2110) 10 ns max.

(IR2113) 20ns max.

www.infineon.com/gatedriver

Description

The IR2110/IR2113 are high voltage, high speed power MOSFET and

IGBT drivers with independent high and low side referenced output chan-

nels. Proprietary HVIC and latch immune CMOS technologies enable

ruggedized monolithic construction. Logic inputs are compatible with

standard CMOS or LSTTL output, down to 3.3V logic. The output

drivers feature a high pulse current buffer stage designed for minimum

driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The

floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which

operates up to 500 or 600 volts.

IR2110(S)PbF/IR2113(S)PbF

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(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical

connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

Typical Connection

Packages

14-Lead PDIP

IR2110/IR2113

16-Lead SOIC

IR2110S/IR2113S

IR2110(S)PbF/IR2113(S)PbF

Recommended Operating Conditions

The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the

recommended conditions. The V

and V

offset ratings are tested with all supplies biased at 15V differential. Typical

ratings at other bias conditions are shown in figures 36 and 37.

Note 1: Logic operational for V

of -4 to +500V. Logic state held for V

of -4V to -V

. (Please refer to the Design Tip

DT97-3 for more details).

Note 2: When V

< 5V, the minimum V

offset is limited to -V

DD.

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-

eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured

under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.

Symbol Definition Min. Max. Units

High side floating supply voltage (IR2110) -0.3 525

(IR2113) -0.3 625

High side floating supply offset voltage V

- 25 V

+ 0.3

High side floating output voltage V

- 0.3 V

+ 0.3

Low side fixed supply voltage -0.3 25

Low side output voltage -0.3 V

+ 0.3

Logic supply voltage -0.3 V

+ 25

Logic supply offset voltage V

- 25 V

+ 0.3

Logic input voltage (HIN, LIN & SD) V

- 0.3 V

+ 0.3

/dt Allowable offset supply voltage transient (figure 2) — 50 V/ns

Package power dissipation @ T

≤ +25°C (14 lead DIP) — 1.6

(16 lead SOIC) — 1.25

THJA

Thermal resistance, junction to ambient (14 lead DIP) — 75

(16 lead SOIC) — 100

Junction temperature — 150

Storage temperature -55 150

Lead temperature (soldering, 10 seconds) — 300

°C/W

°C

Symbol Definition Min. Max. Units

High side floating supply absolute voltage V

+ 10 V

+ 20

High side floating supply offset voltage (IR2110) Note 1 500

(IR2113) Note 1 600

High side floating output voltage V

Low side fixed supply voltage 10 20

Low side output voltage 0 VCC

Logic supply voltage V

+ 3 V

+ 20

Logic supply offset voltage -5 (Note 2) 5

Logic input voltage (HIN, LIN & SD) V

Ambient temperature -40 125 °C

www.infineon.com/gat

edriver

IR2110(S)PbF/IR21

13(S)PbF

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

Turn-on propagation delay 7 — 120 150 V

= 0V

off

Turn-off propagation delay 8 — 94 125 V

= 500V/600V

Shutdown propagation delay 9 — 110 140 V

= 500V/600V

Turn-on rise time 10 — 25 35

Turn-off fall time 11 — 17 25

MT Delay matching, HS & LS (IR2110) — — — 10

turn-on/off (IR2113) — — — 20

Dynamic Electrical Characteristics

BIAS

, V

) = 15V, C

= 1000 pF, T

= 25°C and V

= COM unless otherwise specified. The dynamic

electrical characteristics are measured using the test circuit shown in Figure 3.

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

Logic “1” input voltage 12 9.5 — —

Logic “0” input voltage 13 — — 6.0

High level output voltage, V

BIAS

- V

14 — — 1.2 I

= 0A

Low level output voltage, V

15 — — 0.1 I

= 0A

Offset supply leakage current 16 — — 50 V

= 500V/600V

QBS

Quiescent V

supply current 17 — 125 230 V

= 0V or V

QCC

Quiescent V

supply current 18 — 180 340 V

= 0V or V

QDD

Quiescent V

supply current 19 — 15 30 V

= 0V or V

IN+

Logic “1” input bias current 20 — 20 40 V

= V

IN-

Logic “0” input bias current 21 — — 1.0 V

= 0V

BSUV+

supply undervoltage positive going 22 7.5 8.6 9.7

threshold

BSUV-

supply undervoltage negative going 23 7.0 8.2 9.4

threshold

CCUV+

supply undervoltage positive going 24 7.4 8.5 9.6

threshold

CCUV-

supply undervoltage negative going 25 7.0 8.2 9.4

threshold

O+

Output high short circuit pulsed current 26 2.0 2.5 — V

= 0V, V

= V

PW ≤ 10 µs

O-

Output low short circuit pulsed current 27 2.0 2.5 — V

= 15V, V

= 0V

PW ≤ 10 µs

Static Electrical Characteristics

BIAS

, V

) = 15V, T

= 25°C and V

= COM unless otherwise specified. The V

, V

and I

parameters

are referenced to V

and are applicable to all three logic input leads: HIN, LIN and SD. The V

and I

parameters are

referenced to COM and are applicable to the respective output leads: HO or LO.

µA

www.infineon.com/gatedriver

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