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君正多媒体处理芯片JZ47** Dtatsheet
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2010-03-15
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MIPS核 32位嵌入式处理器;360mHz主频;
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Jz4755
Multimedia Application Processor
Data Sheet
Revision: 0.2
Date: Apr. 2009
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Jz4755 Multimedia Application Processor
Data Sheet
Copyright © Ingenic Semiconductor Co. Ltd 2008. All rights reserved.
Release history
Date Revision Change
Mar. 2009 0.1 First version
Apr. 2009 0.2 CODEC add cap-less
Disclaimer
This documentation is provided for use with Ingenic products. No license to Ingenic property rights is
granted. Ingenic assumes no liability, provides no warranty either expressed or implied relating to the
usage, or intellectual property right infringement except as provided for by Ingenic Terms and
Conditions of Sale.
Ingenic products are not designed for and should not be used in any medical or life sustaining or
supporting equipment.
All information in this document should be treated as preliminary. Ingenic may make changes to this
document without notice. Anyone relying on this documentation should contact Ingenicfor the current
documentation and errata.
Ingenic Semiconductor Co., Ltd.
Room 108, Building A, Information Center, Zhongguancun Software Park
8 Dongbeiwang West Road, Haidian District, Beijing, China,
Tel: 86-10-82826661
Fax: 86-10-82825845
Http: //www.ingenic.cn
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Content
Jz4755 Multimedia Application Processor Data Sheet, Revision 0.6
Copyright® 2005-2007 Ingenic Semiconductor Co., Ltd. All rights reserved.
i
Content
1 Overview............................................................................................ 1
1.1 Block Diagram......................................................................................................................... 2
1.2 Difference between Jz4755 and Jz4752................................................................................. 3
1.3 Features.................................................................................................................................. 4
1.3.1 Main CPU core ................................................................................................................ 4
1.3.2 Aux CPU core.................................................................................................................. 4
1.3.3 Multimedia support .......................................................................................................... 4
1.3.4 Memory sub-system ........................................................................................................ 4
1.3.5 Clock generation and power management ..................................................................... 5
1.3.6 On-chip peripherals ......................................................................................................... 5
1.4 Characteristic .......................................................................................................................... 9
2 Packaging and Pinout Information................................................... 10
2.1 Overview ............................................................................................................................... 10
2.2 Jz4755 Package ....................................................................................................................11
2.3 Pin Description
[1][2]
................................................................................................................ 13
2.3.1 Pin for parallel interfaces............................................................................................... 13
2.3.2 Pin for serial interfaces.................................................................................................. 18
2.3.3 Pin for system................................................................................................................ 19
2.3.4 Pin for analog interfaces and corresponding power/ground ......................................... 20
2.3.5 Pin for IO and core power/ground ................................................................................. 22
3 Electrical Specifications ................................................................... 23
3.1 Absolute Maximum Ratings .................................................................................................. 23
3.2 Recommended operating conditions .................................................................................... 24
3.3 DC Specifications.................................................................................................................. 26
3.4 Power On, Reset and BOOT ................................................................................................ 28
3.4.1 Power-On Timing........................................................................................................... 28
3.4.2 Reset procedure............................................................................................................ 29
3.4.3 BOOT ............................................................................................................................ 30
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Content
Jz4755 Multimedia Application Processor Data Sheet, Revision 0.6
Copyright® 2005-2007 Ingenic Semiconductor Co., Ltd. All rights reserved.
ii
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Overview
Jz4755 Multimedia Application Processor Data Sheet, Revision 0.6
Copyright® 2005-2007 Ingenic Semiconductor Co., Ltd. All rights reserved.
1
1 Overview
Jz4755 is a multimedia application processor targeting for mobile devices like PMP, mobile digital TV,
and GPS. Incorporating the XBurst
®
CPU core based on leading micro-architecture technology,
this processor provides high integration, high performance and low power consumption solution for
embedded device.
This SOC introduces an innovative dual-core architecture to handle mobile computing and high
quality video application. The main XBurst CPU core, with 16K instruction cache and 16K data
cache operating at 360MHz, performs OS related tasks. The auxiliary XBurst core, in together with
the on chip video accelerators and Image Processing Unit, undertake the multimedia tasks.
The memory interface supports a variety of memory types that allow flexible design requirements,
include the glueless connection to SLC/4-bit MLC/8-bit MLC NAND Flash for cost sensitive
applications. On-chip modules such as LCD controller, audio CODEC, multi-channel SAR-ADC,
AC97/I2S controller, TS interface and camera interface offer designers a rich suite of peripherals for
multimedia application. TV encoder unit and 3 channels 10-bits DACs provide
composite/S-video/component TV signal output in PAL or NTSC format. In addition, XVGA output up
to 1024x768 is provided. WLAN, Bluetooth and expansion options are supported through
high-speed SPI and MMC/SD/SDIO host controllers. And the other peripherals such as USB 2.0
device, UART and SPI as well as general system resources provide enough computing and
connectivity capability for many applications.
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