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半导体测试:VLSI测试与可测性设计
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EE141
2
VLSI Test Principles and Architectures
Test Generation
2
Chapter 4
Chapter 4
Test Generation
Test Generation
EE141
3
VLSI Test Principles and Architectures
Test Generation
3
What is this chapter about?
What is this chapter about?
Introduce the basic concepts of ATPG
Focus on a number of combinational and
sequential ATPG techniques
Deterministic ATPG and simulation-based
ATPG
Fast untestable fault identification
ATPG for various fault models
EE141
4
VLSI Test Principles and Architectures
Test Generation
4
Test Generation
Test Generation
Introduction
Random Test Generation
Theoretical Foundations
Deterministic Combinational ATPG
Deterministic Sequential ATPG
Untestable Fault Identification
Simulation-based ATPG
ATPG for Delay and Bridge Faults
Other Topics in Test Generation
Concluding Remarks
EE141
5
VLSI Test Principles and Architectures
Test Generation
5
Introduction
Introduction
Test generation is the bread-and-butter in VLSI
Testing
Efficient and powerful ATPG can alleviate high costs of DFT
Goal: generation of a small set of effective vectors at a low
computational cost
ATPG is a very challenging task
Exponential complexity
Circuit sizes continue to increase (Moore’s Law)
– Aggravate the complexity problem further
Higher clock frequencies
– Need to test for both structural and delay defects
EE141
6
VLSI Test Principles and Architectures
Test Generation
6
Conceptual View of ATPG
Conceptual View of ATPG
Generate an input vector that can distinguish
the defect-free circuit from the hypothetically
defective one
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