Table of Contents
1. Ordering Information and Module Marking................................................................ 5
2. Block Diagram........................................................................................................... 6
3. Pin Description.......................................................................................................... 7
4. Electrical Specifications.............................................................................................9
4.1. Absolute Maximum Ratings..........................................................................................................9
4.2. Recommended Operating Conditions.......................................................................................... 9
5. CPU and Memory Subsystems............................................................................... 10
5.1. Processor................................................................................................................................... 10
5.2. Memory Subsystem....................................................................................................................10
5.3. Non-volatile Memory (eFuse)..................................................................................................... 10
6. WLAN Subsystem................................................................................................... 12
6.1. MAC........................................................................................................................................... 12
6.2. PHY............................................................................................................................................13
6.3. Radio..........................................................................................................................................13
7. External Interfaces...................................................................................................17
7.1. Interfacing with the Host Microcontroller.................................................................................... 17
7.2. SPI Interface...............................................................................................................................18
7.3. UART Interface...........................................................................................................................20
8. Power Consumption................................................................................................ 22
8.1. Description of Device States...................................................................................................... 22
8.2. Current Consumption in Various Device States......................................................................... 22
8.3. Restrictions for Power States..................................................................................................... 23
8.4. Power-up/down Sequence......................................................................................................... 23
8.5. Digital I/O Pin Behavior During Power-up Sequences............................................................... 24
8.6. Module Reset............................................................................................................................. 25
9. Notes On Interfacing to the ATWINC15x0-MR210xB.............................................. 26
9.1. Programmable Pull Up Resistors............................................................................................... 26
10. Schematic Design Information.................................................................................27
10.1. Application Schematic................................................................................................................ 27
11. Module Drawing.......................................................................................................28
11.1. Module Footprint........................................................................................................................ 29
12. Design Considerations............................................................................................ 31
12.1. ATWINC15x0-MR210PB Placement and Routing Guidelines....................................................31
12.2. Printed PCB Antenna Performance of ATWINC15x0-MR210PB............................................... 31
© 2017 Microchip Technology Inc.
Datasheet
DS70005304B-page 3
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