ModBus-RTU.zip

//########################################################################### // // FILE: f28004x_defaultisr.c // // TITLE: f28004x Device Default Interrupt Service Routines // //########################################################################### // $TI Release: F28004x Support Library v1.05.00.00 $ // $Release Date: Thu Oct 18 15:43:57 CDT 2018 $ // $Copyright: // Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // $ //########################################################################### // // Included Files // #include "f28004x_device.h" // F28004x Header File Include File #include "f28004x_examples.h" // F28004x Examples Include File // // TIMER1_ISR - CPU Timer 1 Interrupt // interrupt void TIMER1_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // TIMER2_ISR - CPU Timer 2 Interrupt // interrupt void TIMER2_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // DATALOG_ISR - Datalogging Interrupt // interrupt void DATALOG_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // RTOS_ISR - RTOS Interrupt // interrupt void RTOS_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // EMU_ISR - Emulation Interrupt // interrupt void EMU_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // NMI_ISR - Non-Maskable Interrupt // interrupt void NMI_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // ILLEGAL_ISR - Illegal Operation Trap // interrupt void ILLEGAL_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER1_ISR - User Defined Trap 1 // interrupt void USER1_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER2_ISR - User Defined Trap 2 // interrupt void USER2_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER3_ISR - User Defined Trap 3 // interrupt void USER3_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER4_ISR - User Defined Trap 4 // interrupt void USER4_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER5_ISR - User Defined Trap 5 // interrupt void USER5_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER6_ISR - User Defined Trap 6 // interrupt void USER6_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER7_ISR - User Defined Trap 7 // interrupt void USER7_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER8_ISR - User Defined Trap 8 // interrupt void USER8_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER9_ISR - User Defined Trap 9 // interrupt void USER9_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER10_ISR - User Defined Trap 10 // interrupt void USER10_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER11_ISR - User Defined Trap 11 // interrupt void USER11_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // USER12_ISR - User Defined Trap 12 // interrupt void USER12_ISR(void) { // // Insert ISR Code here // // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // ADCA1_ISR - ADCA Interrupt 1 // interrupt void ADCA1_ISR(void) { // // Insert ISR Code here // // // To receive more interrupts from this PIE group, // acknowledge this interrupt. // // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code // asm (" ESTOP0"); for(;;); } // // ADCB1_ISR - ADCB Interrupt 1 // interrupt void ADCB1_ISR(void) {