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Preliminary Data

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to

change without notice.

July 2007 Rev 2 1/67

STM32F103x6

STM32F103x8 STM32F103xB

Performance line, ARM-based 32-bit MCU with Flash, USB, CAN,

seven 16-bit timers, two ADCs and nine communication interfaces

Features

■ Core: ARM 32-bit Cortex™-M3 CPU

– 72 MHz, 90 DMIPS with 1.25 DMIPS/MHz

– Single-cycle multiplication and hardware

division

– Nested interrupt controller with 43

maskable interrupt channels

– Interrupt processing (down to 6 CPU

cycles) with tail chaining

■ Memories

– 32-to-128 Kbytes of Flash memory

– 6-to-20 Kbytes of SRAM

■ Clock, reset and supply management

– 2.0 to 3.6 V application supply and I/Os

– POR, PDR, and programmable voltage

detector (PVD)

– 4-to-16 MHz quartz oscillator

– Internal 8 MHz factory-trimmed RC

– Internal 32 kHz RC

– PLL for CPU clock

– Dedicated 32 kHz oscillator for RTC with

calibration

■ Low power

– Sleep, Stop and Standby modes

–V

BAT

supply for RTC and backup registers

■ 2 x 12-bit, 1 µs A/D converters (16-channel)

– Conversion range: 0 to 3.6 V

– Dual-sample and hold capability

– Synchronizable with advanced control timer

– Temperature sensor

■ DMA

– 7-channel DMA controller

– Peripherals supported: timers, ADC, SPIs,

Cs and USARTs

■ Debug mode

– Serial wire debug (SWD) & JTAG interfaces

■ Up to 80 fast I/O ports

– 32/49/80 5 V-tolerant I/Os

– All mappable on 16 external interrupt

vectors

– Atomic read/modify/write operations

■ Up to 7 timers

– Up to three 16-bit timers, each with up to 4

IC/OC/PWM or pulse counter

– 16-bit, 6-channel advanced control timer:

up to 6 channels for PWM output

Dead time generation and emergency

stop

– 2 x 16-bit watchdog timers (Independent

and Window)

– SysTick timer: a 24-bit downcounter

■ Up to 9 communication interfaces

– Up to 2 x I

C interfaces (SMBus/PMBus)

– Up to 3 USARTs (ISO 7816 interface, LIN,

IrDA capability, modem control)

– Up to 2 SPIs (18 Mbit/s)

– CAN interface (2.0B Active)

– USB 2.0 full speed interface

Table 1. Device summary

Reference Root part number

STM32F103x6 STM32F103C6, STM32F103R6

STM32F103x8

STM32F103C8, STM32F103R8

STM32F103V8

STM32F103xB STM32F103RB STM32F103VB

LQFP64

10 x 10 mm

LQFP100

14 x 14 mm

LQFP48

7 x 7 mm

BGA100

10 x 10 mm

www.st.com

Contents STM32F103xx

2/67

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1 Test conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.3.2 Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 27

5.3.3 Embedded reset and power control block characteristics . . . . . . . . . . . 28

5.3.4 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.3.5 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.3.6 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5.3.7 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

5.3.8 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.3.9 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

5.3.10 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.3.11 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 42

5.3.12 I/O port pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

5.3.13 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

List of tables STM32F103xx

4/67

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Device features and peripheral counts (STM32F103xx performance line). . . . . . . . . . . . . . 7

Table 3. Pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 4. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 5. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 6. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 7. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 8. Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 9. Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 10. Embedded internal reference voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 11. Maximum current consumption in Run and Sleep modes . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 12. Maximum current consumption in Stop and Standby modes . . . . . . . . . . . . . . . . . . . . . . . 30

Table 13. Typical current consumption in Run and Sleep modes . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 14. Typical current consumption in Stop and Standby modes . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 15. High-speed external (HSE) user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 16. Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. HSE 4-16 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. LSE oscillator characteristics (f

LSE

= 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 19. HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 20. LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 21. Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Table 22. PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Table 23. Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Table 24. Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Table 25. EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Table 26. EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Table 27. ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Table 28. Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Table 29. I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Table 30. Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Table 31. I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Table 32. NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Table 33. TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Table 34. I

C characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Table 35. SCL frequency (f

PCLK1

= 36 MHz.,V

= 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Table 36. SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Table 37. USB DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Table 38. USB: Full speed electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Table 39. ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Table 40. ADC accuracy (f

PCLK2

= 14 MHz, f

ADC

= 14 MHz, R

AIN

<10 kΩ, V

DDA

= 3.3 V). . . . . . . . . 55

Table 41. TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Table 42. LFBGA100 - low profile fine pitch ball grid array package mechanical data. . . . . . . . . . . . 59

Table 43. LQFP100 – 100-pin low-profile quad flat package mechanical data . . . . . . . . . . . . . . . . . 61

Table 44. LQFP64 – 64 pin low-profile quad flat package mechanical data. . . . . . . . . . . . . . . . . . . . 62

Table 45. LQFP48 – 48 pin low-profile quad flat package mechanical data. . . . . . . . . . . . . . . . . . . . 63

Table 46. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Table 47. Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

STM32F103xx List of figures

5/67

List of figures

Figure 1. STM32F103xx performance line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 2. STM32F103xx performance line LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 3. STM32F103xx performance line LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 4. STM32F103xx performance line LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 5. STM32F103xx performance line BGA100 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 6. Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 7. Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 8. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 9. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 10. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 11. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 12. Low-speed external clock source AC timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 13. Typical application with a 8-MHz crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 14. Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 15. Unused I/O pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 16. I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Figure 17. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Figure 18. I

C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Figure 19. SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Figure 20. SPI timing diagram - slave mode and CPHA = 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Figure 21. SPI timing diagram - master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 22. USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Figure 23. ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Figure 24. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Figure 25. Power supply and reference decoupling (V

REF+

not connected to V

DDA

). . . . . . . . . . . . . . 57

Figure 26. Power supply and reference decoupling (V

REF+

connected to V

DDA

). . . . . . . . . . . . . . . . . 57

Figure 27. LFBGA100 - low profile fine pitch ball grid array package outline . . . . . . . . . . . . . . . . . . . 59

Figure 28. Recommended PCB design rules (0.80/0.75 mm pitch BGA) . . . . . . . . . . . . . . . . . . . . . . 60

Figure 29. LQFP100 – 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . 61

Figure 30. LQFP64 – 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Figure 31. LQFP48 – 48 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

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