K10 Sub-Family Reference Manual
Supports: MK10DN512ZVLL10
Document Number: K10P100M100SF2RM
Rev. 6, Nov 2011
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
2 Freescale Semiconductor, Inc.
Contents
Section Number Title Page
Chapter 1
About This Document
1.1 Overview.......................................................................................................................................................................51
1.1.1 Purpose.........................................................................................................................................................51
1.1.2 Audience......................................................................................................................................................51
1.2 Conventions..................................................................................................................................................................51
1.2.1 Numbering systems......................................................................................................................................51
1.2.2 Typographic notation...................................................................................................................................52
1.2.3 Special terms................................................................................................................................................52
Chapter 2
Introduction
2.1 Overview.......................................................................................................................................................................53
2.2 K10 Family Introduction...............................................................................................................................................53
2.3 Module Functional Categories......................................................................................................................................53
2.3.1 ARM Cortex-M4 Core Modules..................................................................................................................54
2.3.2 System Modules...........................................................................................................................................55
2.3.3 Memories and Memory Interfaces...............................................................................................................56
2.3.4 Clocks...........................................................................................................................................................57
2.3.5 Security and Integrity modules....................................................................................................................57
2.3.6 Analog modules...........................................................................................................................................57
2.3.7 Timer modules.............................................................................................................................................58
2.3.8 Communication interfaces...........................................................................................................................59
2.3.9 Human-machine interfaces..........................................................................................................................60
2.4 Orderable part numbers.................................................................................................................................................60
Chapter 3
Chip Configuration
3.1 Introduction...................................................................................................................................................................61
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Section Number Title Page
3.2 Core modules................................................................................................................................................................61
3.2.1 ARM Cortex-M4 Core Configuration..........................................................................................................61
3.2.2 Nested Vectored Interrupt Controller (NVIC) Configuration......................................................................64
3.2.3 Asynchronous Wake-up Interrupt Controller (AWIC) Configuration.........................................................70
3.2.4 JTAG Controller Configuration...................................................................................................................71
3.3 System modules............................................................................................................................................................72
3.3.1 SIM Configuration.......................................................................................................................................72
3.3.2 Mode Controller Configuration...................................................................................................................73
3.3.3 PMC Configuration......................................................................................................................................73
3.3.4 Low-Leakage Wake-up Unit (LLWU) Configuration.................................................................................74
3.3.5 MCM Configuration....................................................................................................................................76
3.3.6 Crossbar Switch Configuration....................................................................................................................76
3.3.7 Memory Protection Unit (MPU) Configuration...........................................................................................78
3.3.8 Peripheral Bridge Configuration..................................................................................................................81
3.3.9 DMA request multiplexer configuration......................................................................................................83
3.3.10 DMA Controller Configuration...................................................................................................................86
3.3.11 External Watchdog Monitor (EWM) Configuration....................................................................................87
3.3.12 Watchdog Configuration..............................................................................................................................88
3.4 Clock Modules..............................................................................................................................................................89
3.4.1 MCG Configuration.....................................................................................................................................89
3.4.2 OSC Configuration......................................................................................................................................90
3.4.3 RTC OSC configuration...............................................................................................................................91
3.5 Memories and Memory Interfaces................................................................................................................................91
3.5.1 Flash Memory Configuration.......................................................................................................................91
3.5.2 Flash Memory Controller Configuration.....................................................................................................94
3.5.3 SRAM Configuration...................................................................................................................................95
3.5.4 SRAM Controller Configuration.................................................................................................................98
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Section Number Title Page
3.5.5 System Register File Configuration.............................................................................................................99
3.5.6 VBAT Register File Configuration..............................................................................................................99
3.5.7 EzPort Configuration...................................................................................................................................100
3.5.8 FlexBus Configuration.................................................................................................................................101
3.6 Security.........................................................................................................................................................................104
3.6.1 CRC Configuration......................................................................................................................................104
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