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摘 要
I
摘
要
全球数字化视频信号处理与便携式通信技术的迅猛发展促使模数转换器不断
向高速与高精度方向发展。基准源作为其中关键模块之一,不仅需要为系统提供
精准的偏置电压和偏置电流,差分基准源还将为其提供比较电平和残差电压,它
的性能将直接影响到系统指标。因此开发出满足系统要求的基准源成为当务之急。
本文首先基于带隙基准电路结构,在考虑运放失调电压、基准噪声等非理想
因素制约情况下,设计了一个高精度单端基准电压源。仿真结果表明在
-40-85
℃
温度范围内温度系数为
4.18ppm/
℃,在
3.0
—
3.6V
电压波动范围内电源电压调整
率为
85ppm/V
。
其次利用已经产生的基准电压源和正温度系数电阻实现负温系数电流获取方
法,和发展令
PMOSFET
源栅电压与阈值电压的电源电压变化率相消从而优化电
源电压调整率的新概念,提出了一种
CMOS
基准电流源新方案。模拟验证结果表
明,在
-40
~
85
℃温度范围内温度系数为
6.9ppm/
℃,于
3.0
~
3.6V
电压区间电源
电压调整率系
10.6ppm/V
。
同时为了避免基准输出端恶化基准源性能,本文对直流基准缓冲器进行了建
模,并对接电阻和开关电容混合负载的直流缓冲器进行了重点分析,最后得出了
ADC
(模数转换器)系统速度和精度与缓冲器单位增益带宽和跨导的关系。
再其次基于带隙基准电压源电阻分压和电流镜失配消除技术,提出了一种新
型高性能差分基准电压源。另外,通过在输出端加入大电容和阻抗变化电阻抑制
了开关电容和输出端高频噪声的影响。该差分电压源的温度系数和电源电压调整
率分别为
4.6ppm/
℃和
1581.5ppm/V
,温度特性很好地跟随了带隙基准电压源。
最后采用
SMIC 0.35
μ
m
双层多晶硅、四层金属的
CMOS
工艺完成了对所开
发电路单元的版图设计并通过了
DRC
和
LVS
验证。
关键词:
流水线
ADC,
基准源
,
基准直流缓冲器
,
低温度系数
,
低电源电压
调整率
ABSTRACT
II
ABSTRACT
The increasing digitalization technology of telecommunications systems and
consumer electronic appliances requires higher performance analog-to-digital
converter (ADC). Reference is the key part of ADC, not only providing the bias
voltage and current for the system but also playing the part of the compared voltage
and subtracted voltage. Its performances are so important to the ADC system that the
research of the reference becomes crucial.
Firstly, based on the principle of the band-gap voltage, a high performance
voltage reference is produced in this paper, considering the influence of the operational
amplifier’s offset voltage and 1/f noise. Based on the SMIC CMOS 0.35µm model,
simulation results in Cadence Hspice indicate that the current reference has a
temperature coefficient(TC) of 6.9ppm/
℃
over the temperature range of -40 to 85
℃
and a line regulation (LR)of 10.6ppm/V for a supply voltage of 3.0 to 3.6V.
Secondly
,
A new CMOS current reference solution is presented, by creating a
negative temperature coefficient current resulted from positive temperature coefficient
resistor and the produced voltage reference, and proposing low line regulation
mechanism which is realized by compensating variations of source-to-gate voltage and
threshold voltage versus supply voltages. Simulation results show that the current
reference has a TC of 6.9ppm/
℃
and LR of 10.6ppm/V.
Thirdly, a model of reference voltage buffer is set , in which the buffer with the
impendence load of resistor and switch capacitor is analyzed in detail and the
relationship between the speed and resolution of ADC and buffer’s gain-bandwidth and
transconductance is obtained.
Fourthly, based on dividing the bandgap voltage reference with resistances and
eliminating the current mirror mismatch, a novel differential reference voltage
generator is presented. Additionally, a big capacitor and a impendence changing
resistor is added to eliminate the influence of switch capacitor and high frequency
noise. Simulation results indicate that the differential reference voltage has TC of
4.6ppm/
℃
and LR of 1581.5ppm/V.
ABSTRACT
III
Lastly, according to the mixed-signal system layout strategy, the layout of these
circuits is designed and checked, with SMIC 0.35µm 2P4M mixed-signal CMOS
process.
Key words:
Pipelined ADC, Reference, Reference buffer, Low temperature
coefficient
,
Low line regulation
目 录
IV
目
录
第一章 绪论 ........................................................................................................................................1
1.1. 基准源指标介绍...................................................................................................................1
1.2. 国内外研究状况...................................................................................................................3
1.3. 本文的选题意义...................................................................................................................5
1.4. 本文的主要内容...................................................................................................................6
第二章 Pipelined ADC 系统中基准源的作用与意义 .......................................................................7
2.1. Pipelined ADC 系统中基准源的作用 ..................................................................................7
2.2. 差分基准电压误差对 ADC 系统的影响 ............................................................................8
第三章 高精度带隙基准电压源的分析与设计...............................................................................10
3.1. 带隙基准电压的原理.........................................................................................................10
3.1.1 V
BE
的负温度系数特性.............................................................................................10
3.1.2 △V
BE
的正温度系数特性........................................................................................10
3.1.3 带隙基准电压的产生...............................................................................................11
3.2. 带隙基准电压源电路设计.................................................................................................12
3.3. 带隙基准电压源核心运放设计.........................................................................................13
3.4. 带隙基准电压源误差分析.................................................................................................14
3.4.1 运放失调电压分析与解决方法...............................................................................14
3.4.2 基准电压源噪声分析...............................................................................................15
3.5. 带隙基准电压源启动电路设计.........................................................................................16
3.6. 基准电压源电路仿真与结果分析.....................................................................................16
第四章 高精度基准电流源的分析与设计.......................................................................................19
4.1. 基准电流源低温漂特性获取方案.....................................................................................19
4.2. 电源电压调整率优化方式与实现.....................................................................................21
4.3. 仿真验证和结果分析.........................................................................................................22
第五章 直流基准缓冲器的分析与设计...........................................................................................25
5.1. 基准缓冲器的分类.............................................................................................................25
5.2. 基准缓冲器的建模与设计.................................................................................................26
5.2.1 ADC 系统对基准缓冲器的限制...............................................................................26
5.2.2 单位增益缓冲器带负载能力分析...........................................................................27
5.3. ADC 系统指标对基准缓冲器的要求 ................................................................................29
第六章 高精度差分基准电压源的设计与实现...............................................................................31
6.1. 传统差分基准电压源结构分析.........................................................................................31
6.2. 新型差分基准电压源设计方案.........................................................................................32
6.3. 差分基准接电阻和开关电容混合负载研究.....................................................................36
6.4. 电路仿真和结果分析.........................................................................................................40
第七章 基准源单元版图研究与设计...............................................................................................44
目 录
V
7.1. 版图设计总体流程.............................................................................................................44
7.2. 版图布局中的主要考虑因素.............................................................................................45
7.2.1 版图布局中金属线的考虑.......................................................................................45
7.2.2 保护环.......................................................................................................................46
7.2.3 衬底噪声...................................................................................................................46
7.3. 版图布局中无源器件的选择和使用.................................................................................46
7.3.1 电阻的类型选择和使用...........................................................................................46
7.3.2 电容的类型选择和使用...........................................................................................47
7.4. 基准单元版图布局中的关键性考虑.................................................................................48
7.4.1 PNP 管在 MOS 工艺中的实现.................................................................................48
7.4.2 版图匹配性考虑.......................................................................................................49
7.4.3 dummy 器件使用 ......................................................................................................50
7.5. 电路单元版图.....................................................................................................................51
第八章 结论与展望 ..........................................................................................................................54
致 谢 ..................................................................................................................................................56
参考文献: ...........................................................................................................................................57
攻读硕士期间取得的研究成果.........................................................................................................59
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