Analog Design at 65 nm.pdf

Analog Design at 65 nm from synopsys Outline • Analog versus digital design in sub-wave length technologies • Design partitioning (Mixed-signal design) • Mixed-signal design example: a duty cycle corrector • Killer sources of variation in analog design STI, WP, CS, OPC/PSM, NBTI, HCI Current mirror example • Analog design trends @ 65 nm • Low jitter PCI ExpressÒ PHY • Yield by design – USB 2.0 PHY • Summary