*************************************************************************
* PASS Multi Core Example
* ---------------------------------
*
* (C) Copyright 2009-2011, Texas Instruments, Inc.
*
* Use of this software is controlled by the terms and conditions found
* in the license agreement under which this software has been supplied.
*************************************************************************
The PASS multi core example demonstrates the use of CPP/QMSS/PA/CSL APIs to
send/receive data through the ethernet switch using Host descriptors
in a multi core scenario.
By default the project runs on 4 cores (0-3). All cores share the same MAC and IP addresses.
Each core has a distinct UDP port associated to it. Each core sends packets towards the RGMII
through the QMSS/CPPI/PASS modules. The packet is looped back at the RGMII and routed to a
specific RX queue depending on the UDP port number. Each core monitors one RX queue.
Each core verifies that it received all of its packets back and declares pass or fail.
Note: The deafult test configuration is for silicon only.
To run the test at the CCS simulator, there are two options.
Option1: Rebuild the project with the compiler option SIMULATOR_SUPPORT.
Option2: Set the following two configuration variables before run:
cpswSimTest = 1
cpswLpbkMode = CPSW_LOOPBACK_EXTERNAL (2)
-------------------------
Steps to run the example
-------------------------
1. Setup RGMII/EMAC Adaptor in the simulator
In order for the example to work successfully, i.e. to be able to send/receive data packets from the wire
the following configuration needs to be done in the simulator:
a) Open the target Configuration file located under CCS simulation directory (simulation_csp_ny). For example,
if CCSv5 is installed to its default directory, i.e., C:\Program Files\Texas Instruments\ccsv5, then
the configuration file can be found at
C:\Program Files\Texas Instruments\ccsv5\ccs_base_5.x.x.xxxxxx\simulation_csp_ny\bin\configurations
I. RGMII-loopback
b) Make sure that the following two lines are uncommented:
This enables loopback at EMAC adaptor level (PHY simulation) in the simulator.
CONNECT11 System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii0_tx_data_gen_opin, System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii1_rx_data_gen_ipin;
CONNECT12 System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii0_rx_data_gen_ipin, System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii1_tx_data_gen_opin;
II. NIC-loopback
b) Pick a NIC on the PC running simulation that you'd like to use to run the example. This will
be the interface using which the packets will be sent/received by the example.
c) Under "EMAC_ADAPTOR" section, locate the following line of code,
INPUT2 ADAPTOR, OFF;
Modify the above line of code to:
INPUT2 ADAPTOR, ON;
This will turn on the EMAC adaptor in simulator so as to send/receive packets.
d) Under the same section, locate and modify the following line of code as follows:
INPUT4 NETWORK_ADAPTOR, Broadcom;
Modify the above line of code to include the name of the NIC card you are using, for example if
the interface you are using for the test on your PC is a "Realtek" card, modify the above line
to:
INPUT4 NETWORK_ADAPTOR, Realtek;
e) If the following lines are uncommented, please comment them:
CONNECT11 System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii0_tx_data_gen_opin, System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii1_rx_data_gen_ipin;
CONNECT12 System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii0_rx_data_gen_ipin, System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii1_tx_data_gen_opin;
as follows:
//CONNECT11 System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii0_tx_data_gen_opin, System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii1_rx_data_gen_ipin;
//CONNECT12 System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii0_rx_data_gen_ipin, System.C66XX_S.SHARED_SYSTEM.SWITCHSS.switchss_sgmii1_tx_data_gen_opin;
This disables loopback at EMAC adaptor level (PHY simulation) in the simulator.
f) Finally, configure the switch MAC configured in the example, i.e., 0x10-0x11-0x12-0x13-0x14-0x15 on the
EMAC adaptor so that the simulator can pass all packets matching the switch MAC up to the application.
example:
INPUT5 MAC_ADDRESS_PORT0, 10-11-12-13-14-15; // configure the Port0 MAC to be the switch MAC
INPUT6 MAC_ADDRESS_PORT1, 00-01-02-03-04-05;
2. Build the CCS project
By default this example is set to run in 4 cores, this way it can run on multiple targets.
In order to change the number of cores, the following should be modified:
#define NUM_CORES <#cores>
This can be found in the multicore_example.h file.
Once the number of cores is set, select the project in CCS, clean it (Project->clean) and build it (Project->build).
3. Execute
To execute the project ensure the following is done:
a) Reset the cores
b) Load the program into the cores (0 - NUM_CORES) before running any core.
c) Run the cores (0 - NUM_CORES).
4. Result
Each core will output to the console its status progress and the number of sent/received packets.
Core 0 will declare pass/fail.
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DSP srio测试程序 (261个子文件)
vectors.asm 2KB
package.bld 3KB
package.bld 3KB
package.bld 2KB
config.bld 478B
config.bld 478B
config.bld 327B
.buildtime 90B
.buildtime 85B
main_pe66.c 1.35MB
Tanspart_main.c 67KB
pa_mgmt.c 40KB
KeyStone_SRIO_Init.c 37KB
cppi_qmss_mgmt.c 36KB
classify1_bin.c 35KB
pam_bin.c 27KB
multicore_example.c 24KB
classify2_bin.c 22KB
ITTC_DSP_SOFT.c 22KB
KeyStone_common.c 22KB
KeyStone_DDR_Init.c 19KB
trans_part.c 19KB
multicore_osal.c 18KB
cpsw_mgmt.c 17KB
SRIO_initial.c 13KB
Keystone_SRIO_drv.c 11KB
edma_Initial.c 11KB
ITTC_DSP_SOFT_ST.c 6KB
qmss_device.c 6KB
cppi_device.c 6KB
Keystone_Serdes_init.c 5KB
ITTC_DSP_SOFT_MAIN.c 5KB
main.c 5KB
SRIO_2DSP_Test.c 4KB
SRIO_Interrupts.c 3KB
IPC_Test.c 3KB
SRIO_loopback_Test.c 3KB
SRIO_internal_loopback_Test.c 2KB
OS_Initial.c 665B
Mem_Manager.c 660B
TSC.c 567B
package_xconfig_stairstep.c 454B
package_xconfig_main.c 439B
package_configPkg.c 430B
xconfig_stairstep.ccs 1KB
xconfig_main.ccs 1KB
configPkg.ccs 1KB
.ccsproject 313B
DSP.ccxml 5KB
stairstep_pe66.cfg 9KB
main_pe66.cfg 9KB
main_pe66.cfg 9KB
main.cfg 5KB
build.cfg 167B
build.cfg 167B
build.cfg 167B
xconfig_stairstep.class 6KB
xconfig_main.class 6KB
configPkg.class 6KB
linker.cmd 15KB
multicore_linker.cmd 572B
.cproject 24KB
.productview.dat 23KB
makefile.defs 739B
main_pe66.dep 49KB
main_pe66.oe66.dep 30KB
package.xdc.dep 3KB
package.xdc.dep 3KB
package.xdc.dep 3KB
main_pe66.cfg.dot 40KB
KeyStone_SRIO_Init.h 20KB
Keystone_Serdes_init.h 10KB
multicore_example.h 7KB
KeyStone_common.h 6KB
Keystone_SRIO_drv.h 4KB
param.h 2KB
ITTC_DSP_SOFT_ST.h 2KB
SRIO_initial.h 2KB
ITTC_DSP_SOFT_TYPE.h 2KB
qmss_types.h 2KB
cppi_types.h 2KB
trans_part.h 2KB
KeyStone_DDR_Init.h 2KB
ITTC_DSP_SOFT.h 1KB
ITTC_DSP_SOFT_MARCO.h 1KB
SRIO_loopback_Test.h 1KB
main.h 1KB
SRIO_internal_loopback_Test.h 1KB
ITTC_DSP_SOFT_MAIN.h 1KB
edma_Initial.h 1KB
SRIO_Interrupts.h 1KB
SRIO_2DSP_Test.h 825B
TSC.h 638B
main_pe66.h 563B
OS_Initial.h 484B
package.defs.h 227B
package.defs.h 212B
package.defs.h 203B
Mem_Manager.h 140B
IPC_Test.h 88B
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