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void BLDC_PHASE_CHANGE(uint8_t step) { #if 0 // H_PWM_L_ON switch(step) { case 4: //B+ C- /* Next step: Step 2 Configuration -------------------------------------- */ TIM_CCxCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCxN_Disable); /* Channel1 configuration */ /* Channel2 configuration */ TIM_SetCompare2(BLDC_TIMx,BLDC_TIM_PERIOD*speed_duty/1000); TIM_CCxCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCx_Enable); /* Channel3 configuration */ TIM_SetCompare3(BLDC_TIMx,BLDC_TIM_PERIOD); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCxN_Enable); break; case 5: //B+ A- /* Next step: Step 3 Configuration -------------------------------------- */ TIM_CCxCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCxN_Disable); /* Channel1 configuration */ TIM_SetCompare1(BLDC_TIMx,BLDC_TIM_PERIOD); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCxN_Enable); /* Channel2 configuration */ TIM_SetCompare2(BLDC_TIMx,BLDC_TIM_PERIOD*speed_duty/1000); TIM_CCxCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCx_Enable); /* Channel3 configuration */ break; case 1: //C+ A- /* Next step: Step 4 Configuration -------------------------------------- */ TIM_CCxCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCxN_Disable); /* Channel1 configuration */ TIM_SetCompare1(BLDC_TIMx,BLDC_TIM_PERIOD); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCxN_Enable); /* Channel2 configuration */ /* Channel3 configuration */ TIM_SetCompare3(BLDC_TIMx,BLDC_TIM_PERIOD*speed_duty/1000); TIM_CCxCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCx_Enable); break; case 3: //C+ B- /* Next step: Step 5 Configuration -------------------------------------- */ TIM_CCxCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCxN_Disable); /* Channel1 configuration */ /* Channel2 configuration */ TIM_SetCompare2(BLDC_TIMx,BLDC_TIM_PERIOD); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCxN_Enable); /* Channel3 configuration */ TIM_SetCompare3(BLDC_TIMx,BLDC_TIM_PERIOD*speed_duty/1000); TIM_CCxCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCx_Enable); break; case 2: //A+ B- /* Next step: Step 6 Configuration -------------------------------------- */ TIM_CCxCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCxN_Disable); /* Channel1 configuration */ TIM_SetCompare1(BLDC_TIMx,BLDC_TIM_PERIOD*speed_duty/1000); TIM_CCxCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCx_Enable); /* Channel2 configuration */ TIM_SetCompare2(BLDC_TIMx,BLDC_TIM_PERIOD); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCxN_Enable); /* Channel3 configuration */ break; case 6: //A+ C- /* Next step: Step 1 Configuration -------------------------------------- */ TIM_CCxCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCxN_Disable); /* Channel1 configuration */ TIM_SetCompare1(BLDC_TIMx,BLDC_TIM_PERIOD*speed_duty/1000); TIM_CCxCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCx_Enable); /* Channel2 configuration */ /* Channel3 configuration */ TIM_SetCompare3(BLDC_TIMx,BLDC_TIM_PERIOD); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCxN_Enable); break; default: TIM_CCxCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_1,TIM_CCxN_Disable); TIM_CCxCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_2,TIM_CCxN_Disable); TIM_CCxCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCx_Disable); TIM_CCxNCmd(BLDC_TIMx,TIM_Channel_3,TIM_CCxN_Disable); break; }