Intel 815E 主板原理图
需积分: 9 164 浏览量
2009-06-27
21:38:17
上传
评论
收藏 687KB PDF 举报
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Revision 1.05 - Fab C
**PLEASE NOTE THESE SCHEMATICS ARE SUBJECT TO CHANGE
PAGETITLE
2
3,4
5
6
7,8
10
11
12,13
9
18
19
20
21
22
23
24
25
1COVER SHEET
BLOCK DIAGRAM
PGA370 PART 1 & 2
AGTL TERMINATION
CLOCK GENERATOR
GMCH PART 1 & 2
DIMM 1 & 2
17
15
16
26
INTERNAL DEBUG HEADERS
DECOUPLING CAPACITORS
PU/PDR & UNUSED GATES
AGP
ICH PART 1 & 2
PCI 1 & 2
AUDIO I/O
AC97 CODEC
VIDEO BUS & CONNECTOR
LPC I/O CONTROLLER & FDCL
KB, MS, GAME & IR
ATX POWER & H/W MONITOR
DIMM 3
27
28
PCI 3
14
FRONT PANEL & CNR
29
30
VREGS: DUALS, 3.3SB, 2.5, VCMOS
WOR, WOL & 2S1P
USB 0-3
31
FWH & UDMA100 IDE 1-2
Intel(R) Pentium(R) III and FC-PGA Celeron(tm) Processor /
815E Chipset Universal Socket 370 Platform
Customer Reference Board Schematics
32
SYSTEM CONFIGURATION
VREGS: VCCVID, V1_8SB
VREGS: VDDQ, VCC1_8, AND VTT
THERMTRIP
33
Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions
of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating
to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability,
or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical,
life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined."
Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising
from future changes to them.
The Intel® 815E chipset may contain design defects or errors known as errata which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product
order.
I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was
developed by Intel. Implementations of the I2C bus/protocol may require licenses from various entities, including Philips
Electronics N.V. and North American Philips Corporation.
Alert on LAN is a result of the Intel-IBM Advanced Manageability Alliance and a trademark of IBM.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained by calling
1-800-548-4725 or by visiting Intel's website at http://www.intel.com.
Intel®, Pentium®, Pentium® III, Celeron™, are trademarks or registered trademarks of Intel Corporation or its subsidiaries in
the United States and other countries.
*Other brands and names may be claimed as the property of others.
Copyright© 2001, Intel Corporation
Intel(R) 815E Chipset Universal Socket 370 CRB
1.05
Title Page
1 33
Monday, April 30, 2001
Monday, April 30, 2001
Document:
Page Name:
Revision:
Platform Applications Engineering
1900 Prairie City Road
Folsom, CA 95630
Last Revised:
Page No:
of
Page:
Doc:
剩余32页未读，继续阅读
评论0
最新资源