ADC12D1600FADC数据手册资源-CSDN文库

数据手册

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ADC12D1000RF, ADC12D1600RF

SNAS519H –JULY 2011–REVISED AUGUST 2015

ADC12D1x00RF 12-Bit, 3.2-GSPS and 2-GSPS RF-Sampling ADC

1 Device Overview

1.1 Features

• Excellent Noise and Linearity up to and Above f

= • Key Specifications

2.7 GHz

– Resolution 12 Bits

• Configurable to Either 3.2 or 2 GSPS Interleaved

– Interleaved 3.2- and 2-GSPS ADC

or 1600 or 1000 MSPS Dual ADC

• IMD

(Fin = 2.7 GHz at –13 dBFS) –63.7/–73

• New DESCLKIQ Mode for High Bandwidth, High

dBFS (Typical)

Sampling Rate Apps

• IMD

(Fin = 2.7 GHz at –16 dBFS) –66.7/–85

• Pin-Compatible With ADC10D1x00, ADC12D1x00

dBFS (Typical)

• AutoSync Feature for Multi-Chip Synchronization

• Noise Floor –154.6/–154 dBm/Hz (Typical)

• Internally Terminated, Buffered, Differential Analog

• Power 3.94/3.42 W (Typical)

Inputs

– Dual 1600/1000 MSPS ADC, Fin = 498 MHz

• Interleaved Timing Automatic and Manual Skew

• ENOB 9.2/9.4 Bits (Typical)

Adjust

• SNR 58.2/58.8 dB (Typical)

• Test Patterns at Output for System Debug

• SFDR 66.7/71.9 dBc (Typical)

• Time Stamp Feature to Capture External Trigger

• Power per Channel 1.97/1.71 W (Typical)

• Programmable Gain, Offset, and t

Adjust

Feature

• 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs

1.2 Applications

• 3G/4G Wireless Basestations • SIGINT

– Receive Path

• RADAR and LIDAR

– DPD Path

• Wideband Communications

• Wideband Microwave Backhaul

• Consumer RFs

• RF Sampling Software Defined Radios

• Tests and Measurements

• Military Communications

1.3 Description

The 12-bit 3.2- and 2-GSPS ADC12D1x00RF is an RF-sampling GSPS ADC that can directly sample

input frequencies up to and above 2.7 GHz. The ADC12D1x00RF augments the very large Nyquist zone

of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable

range beyond the 3

Nyquist zone

The ADC12D1x00RF provides a flexible LVDS interface which has multiple SPI programmable options to

facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-

1996 and supports programmable common-mode voltage. The product is packaged in a lead-free 292-ball

thermally enhanced BGA package over the rated industrial temperature range of –40°C to 85°C.

Device Information

(1)

PART NUMBER PACKAGE BODY SIZE

ADC12D1000RF

BGA (40) 27.00 mm × 27.00 mm

ADC12D1600RF

(1) For more information, see Section 10, Mechanical Packaging and Orderable Information.

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

ADC12D1000RF, ADC12D1600RF

www.ti.com

SNAS519H –JULY 2011–REVISED AUGUST 2015

Table of Contents

1 Device Overview ......................................... 1 5 Detailed Description ................................... 35

1.1 Features .............................................. 1 5.1 Overview ............................................ 35

1.2 Applications........................................... 1 5.2 Functional Block Diagram........................... 35

1.3 Description............................................ 1 5.3 Feature Description ................................. 36

1.4 Functional Block Diagram ............................ 2 5.4 Device Functional Modes ........................... 44

2 Revision History ......................................... 3 5.5 Programming ........................................ 45

3 Pin Configuration and Functions..................... 4 5.6 Register Maps....................................... 50

3.1 Pin Attributes ......................................... 5 6 Application and Implementation .................... 56

4 Specifications........................................... 14 6.1 Application Information .............................. 56

4.1 Absolute Maximum Ratings ......................... 14 6.2 Typical Application .................................. 65

4.2 ESD Ratings ........................................ 14 7 Power Supply Recommendations .................. 68

4.3 Recommended Operating Conditions............... 15 7.1 System Power-on Considerations................... 68

4.4 Thermal Information................................. 15 7.2 Supply Voltage ...................................... 70

4.5 Electrical Characteristics: Static Converter ......... 16 8 Layout .................................................... 71

4.6 Electrical Characteristics: Dynamic Converter ...... 17 8.1 Layout Guidelines ................................... 71

4.7 Electrical Characteristics: Analog Input/Output and

8.2 Layout Example ..................................... 73

Reference ........................................... 21

8.3 Thermal Management............................... 75

4.8 Electrical Characteristics: I-Channel to Q-Channel . 22

9 Device and Documentation Support ............... 77

4.9 Electrical Characteristics: Sampling Clock.......... 22

9.1 Device Support ...................................... 77

4.10 Electrical Characteristics: AutoSync Feature ....... 22

9.2 Documentation Support ............................. 79

4.11 Electrical Characteristics: Digital Control and Output

9.3 Related Links........................................ 80

Pin ................................................... 23

9.4 Community Resources .............................. 80

4.12 Electrical Characteristics: Power Supply............ 24

9.5 Trademarks.......................................... 80

4.13 Electrical Characteristics: AC ....................... 25

9.6 Electrostatic Discharge Caution..................... 80

4.14 Timing Requirements: Serial Port Interface......... 26

9.7 Glossary............................................. 80

4.15 Timing Requirements: Calibration .................. 26

10 Mechanical, Packaging, and Orderable

4.16 Typical Characteristics .............................. 30

Information .............................................. 80

2 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision G (April 2013) to Revision H Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and

Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation

Support section, and Mechanical, Packaging, and Orderable Information section .......................................... 1

Changes from Revision F (April 2013) to Revision G Page

• Changed layout of National Data Sheet to TI format ........................................................................... 55

Submit Documentation Feedback

Product Folder Links: ADC12D1000RF ADC12D1600RF

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

GND V_A SDO TPM NDM V_A GND V_E GND_E DId0+ V_DR DId3+ GND_DR DId6+ V_DR DId9+ GND_DR DId11+ DId11- GND_DR

Vbg GND ECEb SDI CalRun V_A GND GND_E V_E DId0- DId2+ DId3- DId5+ DId6- DId8+ DId9- DId10+ DI0+ DI1+ DI1-

Rtrim+ Vcmo Rext+ SCSb SCLK V_A NC V_E GND_E DId1+ DId2- DId4+ DId5- DId7+ DId8- DId10- DI0- V_DR DI2+ DI2-

DNC Rtrim- Rext- GND GND CAL DNC V_A V_A DId1- V_DR DId4- GND_DR DId7- V_DR GND_DR V_DR DI3+ DI4+ DI4-

V_A Tdiode+ DNC GND GND_DR DI3- DI5+ DI5-

V_A GND_TC Tdiode- DNC GND_DR DI6+ DI6- GND_DR

V_TC GND_TC V_TC V_TC DI7+ DI7- DI8+ DI8-

VinI+ V_TC GND_TC V_A GND GND GND GND GND GND DI9+ DI9- DI10+ DI10-

VinI- GND_TC V_TC VbiasI GND GND GND GND GND GND V_DR DI11+ DI11- V_DR

GND VbiasI V_TC GND_TC GND GND GND GND GND GND ORI+ ORI- DCLKI+ DCLKI-

GND VbiasQ V_TC GND_TC GND GND GND GND GND GND ORQ+ ORQ- DCLKQ+ DCLKQ-

VinQ- GND_TC V_TC VbiasQ GND GND GND GND GND GND GND_DR DQ11+ DQ11- GND_DR

VinQ+ V_TC GND_TC V_A GND GND GND GND GND GND DQ9+ DQ9- DQ10+ DQ10-

V_TC GND_TC V_TC V_TC DQ7+ DQ7- DQ8+ DQ8-

V_A GND_TC V_TC V_TC V_DR DQ6+ DQ6- V_DR

V_A GND_TC GND_TC GND V_DR DQ3- DQ5+ DQ5-

GND_TC CLK+ PDI GND GND

RCOut1-

DNC V_A V_A DQd1- V_DR DQd4- GND_DR DQd7- V_DR V_DR GND_DR DQ3+ DQ4+ DQ4-

CLK-

DCLK

_RST+

PDQ CalDly DES

RCOut2+ RCOut2-

V_E GND_E DQd1+ DQd2- DQd4+ DQd5- DQd7+ DQd8- DQd10- DQ0- GND_DR DQ2+ DQ2-

DCLK

_RST-

GND DNC DDRPh RCLK- V_A GND GND_E V_E DQd0- DQd2+ DQd3- DQd5+ DQd6- DQd8+ DQd9- DQd10+ DQ0+ DQ1+ DQ1-

GND V_A FSR RCLK+

RCOut1+

V_A GND V_E GND_E DQd0+ V_DR DQd3+ GND_DR DQd6+ V_DR DQd9+ GND_DR DQd11+ DQd11- GND_DR

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

ADC12D1000RF, ADC12D1600RF

SNAS519H –JULY 2011–REVISED AUGUST 2015

www.ti.com

3 Pin Configuration and Functions

BGA Package

292-Pin NXA

Top-View

The center ground pins are for thermal dissipation and must be soldered to a ground plane to ensure rated

performance. See Section 8.1 for more information.

Submit Documentation Feedback

Product Folder Links: ADC12D1000RF ADC12D1600RF

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