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· Operating voltage: 3.3V (typ.) · Internal voltage reference · Low Power CMOS: 300 mW (typ.) · Multiplexed byte-wide output (8+8 format) · Power-Down Mode: 10mA (max.) · Programmable 3-wire serial interface · 16-Bit 30 MSPS A/D converter · 3 .3V digital I/O compatibility · Guaranteed won¢t miss codes · 3-Channel operation up to 30 MSPS · 1~5.85x programmable gain · 2-Channel (even-odd) operation up to 30 MSPS · Correlated double sampling · 1-Channel operation up to 20 MSPS · ±250 mV programmabl
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HT82V38
16-Bit CCD/CIS Analog Signal Processor
Block Diagram
Rev. 1.00 1 July 23, 2009
Features
·
Operating voltage: 3.3V (typ.)
·
Low Power CMOS: 300 mW (typ.)
·
Power-Down Mode: 10mA (max.)
·
16-Bit 30 MSPS A/D converter
·
Guaranteed won¢t miss codes
·
1~5.85x programmable gain
·
Correlated double sampling
·
±250 mV programmable offset
·
Input clamp circuitry
·
Internal voltage reference
·
Multiplexed byte-wide output (8+8 format)
·
Programmable 3-wire serial interface
·
3 .3V digital I/O compatibility
·
3-Channel operation up to 30 MSPS
·
2-Channel (even-odd) operation up to 30 MSPS
·
1-Channel operation up to 20 MSPS
·
28-pin SSOP (209mil) package
3 . 1
M U X
C D S
+
P G A
9 - B i t
D A C
C D S
+
P G A
9 - B i t
D A C
C D S
+
P G A
9 - B i t
D A C
1 6 - B i t
A D C
R E D
G R E E N
B L U E
R E D
G R E E N
B L U E
9
6
C o n f i g u r a t i o n
R e g i s t e r
M U X
R e g i s t e r
D i g i t a l
C o n t r o l
I n t e r f a c e
1 6 : 8
M U X
1 6 8
B A N D G A P
R e f e r e n c e
I n p u t
C l a m p
B i a s
O f f s e t
R e g i s t e r s
G a i n
R e g i s t e r s
A V D D A V S S R E F T R E F B A V D D A V S S D V D D D V S S
V I N R
V I N G
V I N B
O F F S E T
C D S C L K 1 C D S C L K 2 A D C C L K
O E
D O U T
S C L K
S L O A D
S D A T A
General Description
The HT82V38 is a complete analog signal processor for
CCD imaging applications. It features a 3 channel archi-
tecture designed to sample and condition the outputs of
trilinear color CCD arrays. Each channel consists of an
input clamp, Correlated Double Sampler (CDS), offset
DAC and Programmable Gain Amplifier (PGA), multi-
plexed to a high performance 16-bit A/D converter.
The CDS amplifiers may be disabled for use with sen-
sors such as Contact Image Sensors (CIS) and CMOS
active pixel sensors, which do not require CDS.
The 16-bit digital output is multiplexed into an 8-bit out-
put word that is accessed using two read cycles. The in-
ternal registers are programmed through a 3-wire serial
interface, and provide adjustment of the gain, offset, and
operating mode.
Applications
·
Flatbed document scanners
·
Film scanners
·
Digital color copiers
·
Multifunction peripherals
Pin Assignment
Pin Description
Pin No. Pin Name I/O Description
1 CDSCLK1 DI CDS Reference Clock Pulse Input
2 CDSCLK2 DI CDS Data Clock Pulse Input
3 ADCCLK DI A/D Sample Clock Input for 3-channels Mode
4OE
DI
Output Enable, Active Low
Internal pull-low 50W
5 DVDD P Digital Power
6 DVSS P Digital Ground
7~14 D7~D0 DO Digital Data Output
15 SDATA DI/DO Serial Data Input/Output
16 SCLK DI Clock Input for Serial Interface
17 SLOAD DI Serial Interface Load Pulse
18, 28 AVDD P Analog Supply
19, 27 AVSS P Analog Ground
20 REFB AO Reference Decoupling
21 REFT AO Reference Decoupling
22 VINB AI Analog Input, Blue
23 CML AO Internal Reference Output
24 VING AI Analog Input, Green
25 OFFSET AO Clamp Bias Level Decoupling
26 VINR AI Analog Input, Red
Note: AI=Analog Input, AO=Analog Output, DI=Digital Input, DO=Digital Output, P=Power
HT82V38
Rev. 1.00 2 July 23, 2009
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
A V D D
A V S S
V I N R
O F F S E T
V I N G
C M L
V I N B
R E F T
R E F B
A V S S
A V D D
S L O A D
S C L K
S D A T A
C D S C L K 1
C D S C L K 2
A D C C L K
O E
D V D D
D V S S
D 7 ( M S B )
D 6
D 5
D 4
D 3
D 2
D 1
D 0 ( L S B )
H T 8 2 V 3 8
2 8 S S O P - A
Absolute Maximum Ratings
Supply Voltage ..........................V
SS
-0.3V to V
SS
+4.3V
Storage Temperature ...........................-50°Cto125°C
Input Voltage .............................V
SS
-0.3V to V
DD
+0.3V
Operating Temperature ..............................0°Cto70°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol Parameter
Test Conditions
Min. Typ. Max. Unit
V
DD
Conditions
Logic Inputs
V
IH
High Level Input Voltage
¾¾
0.8V
DD
¾¾
V
V
IL
Low Level Input Voltage
¾¾ ¾¾
0.2V
DD
V
I
IH
High Level Input Current
¾¾ ¾¾
1
mA
I
IL
Low Level Input Current
¾¾ ¾¾
1
mA
C
IN
Input Capacitance
¾¾ ¾
5
¾
pF
Logic Outputs
V
OH
High Level Output Voltage
¾
I
OH
=3mA DV
DD
-0.5
¾¾
V
V
OL
Low Level Output Voltage
¾
I
OL
=3mA
¾¾
0.5 V
A.C. Characteristics
Symbol Parameter
Test Conditions
Min. Typ. Max. Unit
V
DD
Conditions
Power Supplies
AV
DD
AVDD
¾¾
3.15 3.3 3.45 V
DV
DD
DVDD
¾¾
3.15 3.3 3.45 V
Maximum Conversion Rate
t
MAX
3-channel Mode with CDS
¾¾
30
¾¾
MPS
2-channel Mode with CDS
¾¾
30
¾¾
MPS
1-channel Mode with CDS
¾¾
20
¾¾
MPS
Accuracy (Entire Signal Path)
ADC Resolution
¾¾ ¾
16
¾
Bits
Integral Nonlinear (INL)
¾¾ ¾±32 ¾
LSB
Differential Nonlinear (DNL)
¾¾ -1 ¾
+1 mV
Offset Error
¾¾ -100 ¾
+100 mV
Gain Error
¾¾ ¾
5
¾
%FSR
HT82V38
Rev. 1.00 3 July 23, 2009
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