TCC9100 TCC9100_CHIP_SPEC Jul 09, 2010
High Performance and Low-Power Processor for Digital Media Applications TABLE OF CONTENTS
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TABLE OF CONTENTS
Contents
1 Introduction ........................................................................................................................................................................ 1-1
1.1 TCC9100 Features................................................................................................................................................... 1-2
1.2 Applications .............................................................................................................................................................. 1-5
1.3 Block Diagram.......................................................................................................................................................... 1-6
2 Hardware Features............................................................................................................................................................. 2-7
3 PIN Description ................................................................................................................................................................ 3-15
3.1 TCC9100 Pin Description....................................................................................................................................... 3-15
3.2 TCC9100 I/O Type ................................................................................................................................................. 3-25
4 Package Information ........................................................................................................................................................ 4-27
4.1 Dimension .............................................................................................................................................................. 4-27
4.2 Ball Map ................................................................................................................................................................. 4-28
5 Electrical Specification...................................................................................................................................................... 5-29
5.1 Absolute Maximum Ratings.................................................................................................................................... 5-29
5.2 Recommended Operating Conditions .................................................................................................................... 5-30
5.3 Recommended Operating Frequency .................................................................................................................... 5-31
5.4 Electrical Characteristics for Power Supply............................................................................................................ 5-34
5.5 Electrical Characteristics for General I/O ............................................................................................................... 5-35
5.6 Electrical Characteristics for PLL ........................................................................................................................... 5-36
5.7 Electrical Characteristics for Video DAC ................................................................................................................ 5-37
5.8 Electrical Characteristics for ADC(for Touch Screen) ............................................................................................. 5-38
5.9 Electrical Characteristics for LCD Interface............................................................................................................ 5-39
5.10 Electrical Characteristics for Camera Interface .................................................................................................... 5-41
5.11 Electrical Characteristics for External Host Interface (EHI) .................................................................................. 5-43
5.12 Electrical Characteristics for SD/MMC Controller................................................................................................. 5-44
5.13 Electrical Characteristics for I2C Controller.......................................................................................................... 5-45
5.14 Electrical Characteristics for SPDI/F Transmitter ................................................................................................. 5-46
5.15 Electrical Characteristics for DAI(I2S) .................................................................................................................. 5-47
5.16 Electrical Characteristics for Nand Flash Controller ............................................................................................. 5-49
5.17 Electrical Characteristics for UART Controller...................................................................................................... 5-52
5.18 Electrical Characteristics for DDR ........................................................................................................................ 5-56
Figures
Figure 1.1 TCC910 Functional Block Diagram........................................................................................................ 1-6
Figure 4.1 TCC9100 Package Dimension............................................................................................................. 4-27
Figure 4.2 TCC9100 Ball Map............................................................................................................................... 4-28
Figure 5.1 Timing Diagram for LCD Controller ...................................................................................................... 5-39
Figure 5.2 Timing Diagram Data Output Referenced to PXCLK ........................................................................... 5-39
Figure 5.3 Timing Diagram Data Output Referenced to LCDSI............................................................................. 5-40
Figure 5.4 Timing Diagram for Camera Interface .................................................................................................. 5-41
Figure 5.5 Timing Diagram Data Output Referenced to CCLK.............................................................................. 5-41
Figure 5.6 EHI Timing Diagram............................................................................................................................. 5-43
Figure 5.7 Timing Diagram for SD/MMC Controller............................................................................................... 5-44
Figure 5.8 Timing Diagram for I2C Controller........................................................................................................ 5-45
Figure 5.9 Timing Diagram for SPDI/F Transmitter ............................................................................................... 5-46
Figure 5.10 Timing Diagram for DAI (receiver)...................................................................................................... 5-47
Figure 5.11 Timing Diagram for DAI Transmitter ................................................................................................... 5-48
Figure 5.12 Timing Diagram for Command Latch Enable Cycle ........................................................................... 5-49
Figure 5.13 Timing Diagram for Single Address Latch Cycle ................................................................................ 5-49
Figure 5.14 Timing Diagram for Linear Address Latch Cycle ................................................................................ 5-49
Figure 5.15 Timing Diagram for Single Data Write Cycle...................................................................................... 5-49
Figure 5.16 Timing Diagram for Linear Data Write Cycle...................................................................................... 5-50
Figure 5.17 Timing Diagram for Single Data Read Cycle...................................................................................... 5-50
Figure 5.18 Timing Diagram for Linear Data Read Cycle...................................................................................... 5-50
Figure 5.19 Timing Diagram for TXD..................................................................................................................... 5-52
Figure 5.20 Timing Diagram for RXD .................................................................................................................... 5-52
Figure 5.21 Timing Diagram for TX Operation with H/W Flow Control .................................................................. 5-53
Figure 5.22 Timing Diagram for nCTS Timing Diagram ........................................................................................ 5-54
Figure 5.23 Timing Diagram for RX Operation with H/W Flow Control.................................................................. 5-54
Figure 5.24 Timing Diagram for nRTS Timing Diagram......................................................................................... 5-55
Figure 5.25 Write Cycle Timing ............................................................................................................................. 5-56
Figure 5.26 Read Cycle Timing............................................................................................................................. 5-56
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