// TI File $Revision: /main/2 $
// Checkin $Date: January 14, 2008 11:17:46 $
//###########################################################################
//
// FILE: DSP2833x_DefaultIsr.c
//
// TITLE: DSP2833x Device Default Interrupt Service Routines.
//
// This file contains shell ISR routines for the 2833x PIE vector table.
// Typically these shell ISR routines can be used to populate the entire PIE
// vector table during device debug. In this manner if an interrupt is taken
// during firmware development, there will always be an ISR to catch it.
//
// As develpment progresses, these ISR rotuines can be eliminated and replaced
// with the user's own ISR routines for each interrupt. Since these shell ISRs
// include infinite loops they will typically not be included as-is in the final
// production firmware.
//
//###########################################################################
// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
// $Release Date: August 1, 2008 $
//###########################################################################
#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h" // DSP2833x Examples Include File
// Connected to INT13 of CPU (use MINT13 mask):
// Note CPU-Timer1 is reserved for TI use, however XINT13
// ISR can be used by the user.
interrupt void INT13_ISR(void) // INT13 or CPU-Timer1
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// Note CPU-Timer2 is reserved for TI use.
interrupt void INT14_ISR(void) // CPU-Timer2
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void DATALOG_ISR(void) // Datalogging interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void RTOSINT_ISR(void) // RTOS interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void EMUINT_ISR(void) // Emulation interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void NMI_ISR(void) // Non-maskable interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm(" ESTOP0");
for(;;);
}
interrupt void USER1_ISR(void) // User Defined trap 1
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER2_ISR(void) // User Defined trap 2
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER3_ISR(void) // User Defined trap 3
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER4_ISR(void) // User Defined trap 4
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER5_ISR(void) // User Defined trap 5
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER6_ISR(void) // User Defined trap 6
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER7_ISR(void) // User Defined trap 7
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER8_ISR(void) // User Defined trap 8
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER9_ISR(void) // User Defined trap 9
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER10_ISR(void) // User Defined trap 10
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER11_ISR(void) // User Defined trap 11
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER12_ISR(void) // User Defined trap 12
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// -----------------------------------------------------------
// PIE Group 1 - MUXed into CPU INT1
// -----------------------------------------------------------
// INT1.1
interrupt void SEQ1INT_ISR(void) //SEQ1 ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.2
interrupt void SEQ2INT_ISR(void) //SEQ2 ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm(" ESTOP0");
for(;;);
}
// INT1.3 - Reserved
// INT1.4
interrupt void XINT1_ISR(void)
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.5
interrupt void XINT2_ISR(void)
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.6
interrupt void ADCINT_ISR(void) // ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.7
interrupt void TINT0_ISR(void) // CPU-Timer 0
{
// Insert ISR Code here
// To receive more interrupts fro
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基于DSP的虚拟同步发电机控制代码 (147个子文件)
DSP2833x_CodeStartBranch.asm 3KB
DSP2833x_usDelay.asm 3KB
DSP2833x_ADC_cal.asm 1KB
DSP2833x_DefaultIsr.c 30KB
DSP2833x_ECan.c 16KB
main.c 15KB
eCAN.c 12KB
DSP2833x_SysCtrl.c 12KB
DSP2833x_GlobalVariableDefs.c 11KB
DSP2833x_EPwm.c 11KB
DSP2833x_Xintf.c 10KB
ePWMs.c 8KB
DSP2833x_PieVect.c 7KB
DSP2833x_Sci.c 6KB
SCI.c 5KB
ADC_volt_current_get.c 5KB
DSP2833x_Gpio.c 3KB
Coordinate_Trans.c 3KB
DSP2833x_PieCtrl.c 3KB
DSP2833x_Adc.c 2KB
dq_model.c 2KB
SYNC.c 1KB
mech.c 1KB
PI.c 1KB
OneOderInertia.c 956B
QV.c 721B
PQ.c 617B
.ccsproject 567B
28335_Flash_lnk.cmd 9KB
DSP2833x_Headers_nonBIOS.cmd 8KB
28335_RAM_lnk.cmd 8KB
.cproject 22KB
main.d 6KB
ADC_volt_current_get.d 5KB
Coordinate_Trans.d 5KB
OneOderInertia.d 5KB
dq_model.d 5KB
ePWMs.d 5KB
mech.d 5KB
SYNC.d 5KB
PI.d 5KB
QV.d 5KB
DSP2833x_DefaultIsr.d 4KB
SCI.d 4KB
DSP2833x_SysCtrl.d 4KB
DSP2833x_PieVect.d 4KB
DSP2833x_PieCtrl.d 4KB
DSP2833x_Xintf.d 4KB
DSP2833x_Gpio.d 4KB
DSP2833x_ECan.d 4KB
DSP2833x_EPwm.d 4KB
DSP2833x_Adc.d 4KB
DSP2833x_Sci.d 4KB
DSP2833x_GlobalVariableDefs.d 3KB
PQ.d 1KB
DSP2833x_SWPrioritizedIsrLevels.h 142KB
IQmathlib.h 123KB
DSP2833x_ECan.h 44KB
DSP2833x_Mcbsp.h 31KB
DSP2833x_EPwm.h 16KB
DSP2833x_Gpio.h 15KB
DSP2833x_DMA.h 14KB
DSP2833x_SysCtrl.h 13KB
DSP2833x_Adc.h 10KB
DSP2833x_EQep.h 10KB
DSP2833x_GlobalPrototypes.h 8KB
DSP2833x_Sci.h 8KB
DSP2833x_I2c.h 7KB
DSP2833x_PieVect.h 6KB
DSP2833x_DefaultIsr.h 6KB
DSP2833x_Spi.h 6KB
DSP2833x_ECap.h 6KB
DSP2833x_Device.h 6KB
DSP2833x_PieCtrl.h 6KB
DSP2833x_CpuTimers.h 6KB
DSP2833x_Examples.h 5KB
DSP2833x_I2c_defines.h 4KB
DSP2833x_EPwm_defines.h 4KB
DSP2833x_Xintf.h 4KB
dq_model.h 4KB
Coordinate_Trans.h 3KB
ADC_volt_current_get.h 3KB
DSP2833x_DevEmu.h 3KB
dlog4ch.h 3KB
SFO_V5.h 3KB
OneOderInertia.h 3KB
C28x_FPU_FastRTS.h 3KB
mech.h 3KB
SYNC.h 3KB
PI.h 2KB
DSP2833x_XIntrupt.h 2KB
ePWMs.h 2KB
SFO.h 2KB
DSP2833x_Dma_defines.h 2KB
QV.h 2KB
PQ.h 1KB
SCI.h 1KB
DSP28x_Project.h 761B
VSG_project.h 247B
rts2800_fpu32.lib 7.54MB
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