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A5133 Data Sheet, 5.8GHz 15dBm FSK Transceiver. 低延時收發IC; A5133 內建的LDO,支持2.0~3.6 V的工作電壓,最大TX Power 為+ 15dBm (91mA),若將功率放大器輸出級電源設置於3.3V,輸出功率可進一步推升,接收靈敏度為-90dBm (@4 Mbps FSK @ 33.6mA) ,最大Link budget為107dB ———————————————— 版权声明:本文为CSDN博主「本森C」的原创文章,遵循CC 4.0 BY-SA版权协议,转载请附上原文出处链接及本声明。 原文链接:https://blog.csdn.net/BensonCheng/article/details/128097384
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A5133
5.8GHz 15dBm FSK Transceiver
Jul., 2022, Version 0.8 (Preliminary) 1 AMICCOM Electronics Corporation
Document Title
A5133 Data Sheet, 5.8GHz 15dBm FSK Transceiver.
Revision History
Rev. No. History Issue Date Remark
0.0 Initial issue. Jan., 2019 Objective
0.1 Change TX maximum output power. Delete deep sleep mode.
Delete QFN5x5 package.
Apr., 2019 Preliminary
0.2
Update application circuit.
Simplify chapter 14 LO frequency
setting. Update current consumption and RX sensitivity
specification. Update chapter 9 register.
Update top marking
information.
Sep., 2019 Preliminary
0.3 Modify TDL formula. Update application circuit. Oct., 2019 Preliminary
0.4 Correct FEP bit number. Nov., 2019 Preliminary
0.5 Update RH, RL, GIO1, GIO2 register. Jun., 2020 Preliminary
0.6 Update chapter 7 input RF level. Sep., 2021 Preliminary
0.7 Update RFP, RFN pin description. Nov., 2021 Preliminary
0.8 Modify chapter 12 external clock description. Jul., 2022 Preliminary
Important Notice:
AMICCOM reserves the right to make changes to its products or to discontinue any integrated circuit product or service
without notice. AMICCOM integrated circuit products are not designed, intended, authorized, or warranted to be suitable for
use in life-support applications, devices or systems or other critical applications. Use of AMICCOM products in such
applications is understood to be fully at the risk of the customer.
AMICCOM CONFIDENTIAL
![](https://csdnimg.cn/release/download_crawler_static/87243623/bg2.jpg)
A5133
5.8GHz 15dBm FSK Transceiver
Jul., 2022, Version 0.8 (Preliminary) 2 AMICCOM Electronics Corporation
Table of Contents
1. General Description .............................................................................................................................................................. 5
2. Typical Applications ............................................................................................................................................................... 5
3. Features ................................................................................................................................................................................ 6
4. Pin Configurations................................................................................................................................................................. 7
5. Pin Descriptions (I: input; O: output, I/O: input or output) ...................................................................................................... 8
6. Chip Block Diagram .............................................................................................................................................................. 9
7. Absolute Maximum Ratings ................................................................................................................................................ 10
8. Electrical Specification ......................................................................................................................................................... 11
9. Control Register .................................................................................................................................................................. 13
9.1 Control Register Table ............................................................................................................................................... 13
9.2 Control Register Description ...................................................................................................................................... 17
9.2.1 Mode Register (Address: 00h) ......................................................................................................................... 17
9.2.2 Mode Control Register (Address: 01h) ............................................................................................................ 17
9.2.3 Calibration Control Register (Address: 02h) .................................................................................................... 18
9.2.4 FIFO Register I (Address: 03h) ........................................................................................................................ 19
9.2.5 FIFO Register II (Address: 04h) ....................................................................................................................... 19
9.2.6 FIFO DATA Register II (Address: 05h) ............................................................................................................. 19
9.2.7 ID DATA Register (Address: 06h) .................................................................................................................... 19
9.2.8 RC OSC Register I (Address: 07h) .................................................................................................................. 19
9.2.9 RC OSC Register II (Address: 08h) ................................................................................................................. 20
9.2.10 RC OSC Register III (Address: 09h) .............................................................................................................. 20
9.2.11 CKO Pin Control Register (Address: 0Ah) ..................................................................................................... 20
9.2.12 GIO1 Pin Control Register (Address: 0Bh) .................................................................................................... 21
9.2.13 GIO2 Pin Control Register (Address: 0Ch) .................................................................................................... 22
9.2.14 Data Rate Clock Register (Address: 0Dh) ..................................................................................................... 23
9.2.15 PLL Register I (Address: 0Eh) ....................................................................................................................... 23
9.2.16 PLL Register II (Address: 0Fh) ...................................................................................................................... 23
9.2.17 PLL Register III (Address: 10h)...................................................................................................................... 23
9.2.18 PLL Register IV (Address: 11h) ..................................................................................................................... 24
9.2.19 PLL Register V (Address: 12h) ...................................................................................................................... 24
9.2.20 Channel Group Register I (Address: 13h) ...................................................................................................... 24
9.2.21 Channel Group Register II (Address: 14h) ..................................................................................................... 24
9.2.22 TX Register I (Address: 15h) ......................................................................................................................... 24
9.2.23 TX Register II (Address: 16h) ........................................................................................................................ 25
9.2.24 Delay Register I (Address: 17h) ..................................................................................................................... 25
9.2.25 Delay Register II (Address: 18h) .................................................................................................................... 26
9.2.26 RX Register (Address: 19h) ........................................................................................................................... 27
9.2.27 RX Gain Register I (Address: 1Ah) ................................................................................................................ 27
9.2.28 RX Gain Register II (Address: 1Bh) ............................................................................................................... 28
9.2.29 RX Gain Register III (Address: 1Ch) .............................................................................................................. 28
9.2.30 RX Gain Register IV (Address: 1Dh) ............................................................................................................. 28
9.2.31 RSSI Threshold Register (Address: 1Eh) ...................................................................................................... 29
9.2.32 ADC Control Register (Address: 1Fh) ............................................................................................................ 29
9.2.33 Code Register I (Address: 20h) (AGT[3:0]=0, page 0) ................................................................................... 29
9.2.34 Code Register II (Address: 21h) (AGT[3:0]=0, page 0) .................................................................................. 30
9.2.35 Code Register III (Address: 22h) (AGT[3:0]=0, page 0) ................................................................................. 31
9.2.36 IF Calibration Register I (Address: 23h)......................................................................................................... 31
9.2.37 IF Calibration Register II (Address: 24h)........................................................................................................ 31
9.2.38 VCO Current Calibration Register (Address: 25h) ......................................................................................... 32
9.2.39 VCO Bank Calibration Register I (Address: 26h) ........................................................................................... 32
9.2.40 VCO Bank Calibration Register II (Address: 27h) .......................................................................................... 33
9.2.41 VCO Deviation Calibration Register I (Address: 28h) .................................................................................... 33
9.2.42 VCO Deviation Calibration Register II (Address: 29h) ................................................................................... 33
9.2.43 DASP0 (Address: 2Ah)(AGT[3:0]=0, page 0) ................................................................................................ 33
9.2.44 DASP1 (Address: 2Ah) (AGT[3:0]=1, page 1) ............................................................................................... 34
9.2.45 DASP2 (Address: 2Ah) (AGT[3:0]=2, page 2) ............................................................................................... 34
9.2.46 DASP3 (Address: 2Ah) (AGT[3:0]=3, page 3) ............................................................................................... 34
9.2.47 DASP4 (Address: 2Ah) (AGT[3:0]=4, page 4) ............................................................................................... 34
9.2.48 DASP5 (Address: 2Ah) (AGT[3:0]=5, page 5) ............................................................................................... 34
AMICCOM CONFIDENTIAL
![](https://csdnimg.cn/release/download_crawler_static/87243623/bg3.jpg)
A5133
5.8GHz 15dBm FSK Transceiver
Jul., 2022, Version 0.8 (Preliminary) 3 AMICCOM Electronics Corporation
9.2.49 DASP6 (Address: 2Ah) (AGT [3:0]=6, page 6) .............................................................................................. 35
9.2.50 DASP7 (Address: 2Ah) (AGT[3:0]=7, page 7) ............................................................................................... 35
9.2.51 DASP8 (Address: 2Ah) (AGT[3:0]=8, page 8) ............................................................................................... 35
9.2.52 DASP9 (Address: 2Ah) (AGT[3:0]=9, page 9) ............................................................................................... 35
9.2.53 DASP10 (Address: 2Ah) (AGT[3:0]=10, page 10) ......................................................................................... 36
9.2.54 DASP11 (Address: 2Ah) (AGT[3:0]=11, page 11) .......................................................................................... 36
9.2.55 DASP12(Address: 2Ah) (AGT[3:0]=12 page 12............................................................................................. 36
9.2.56 VCO Modulation Delay Register (Address: 2Bh) ........................................................................................... 36
9.2.57 Battery Detect Register (Address: 2Ch)......................................................................................................... 36
9.2.58 TX Test Register (Address: 2Dh) ................................................................................................................... 37
9.2.59 RX DEM Test Register I (Address: 2Eh) ........................................................................................................ 37
9.2.60 RX DEM Test Register II (Address: 2Fh) ....................................................................................................... 38
9.2.61 Charge Pump Current Register I (Address: 30h) ........................................................................................... 38
9.2.62 Charge Pump Current Register II (Address: 31h) .......................................................................................... 38
9.2.63 Crystal Test Register (Address: 32h) ............................................................................................................. 39
9.2.64 PLL Test Register (Address: 33h) .................................................................................................................. 39
9.2.65 VCO Test Register (Address: 34h)................................................................................................................. 39
9.2.66 RF Analog Test Register (Address: 35h) ........................................................................................................ 40
9.2.67 Key data Register (Address: 36h) .................................................................................................................. 40
9.2.68 Channel Select Register (Address: 37h)........................................................................................................ 41
9.2.69 ROMP0 (Address: 38h)(AGT[3:0]=0, page 0) ................................................................................................ 41
9.2.70 ROMP1 (Address: 38h)(AGT[3:0]=1, page 1) ................................................................................................ 41
9.2.71 ROMP2 (Address: 38h)(AGT[3:0]=2, page 2) ................................................................................................ 41
9.2.72 ROMP3 (Address: 38h)(AGT[3:0]=3, page 3) ................................................................................................ 41
9.2.73 ROMP4 (Address: 38h)(AGT[3:0]=4, page 4) ................................................................................................ 41
9.2.74 ROMP5 (Address: 38h)(AGT[3:0]=5, page 5) ................................................................................................ 42
9.2.75 ROMP6 (Address: 38h)(AGT[3:0]=6, page 6) ................................................................................................ 42
9.2.76 ROMP7 (Address: 38h)(AGT[3:0]=7, page 7) ................................................................................................ 42
9.2.77 ROMP8 (Address: 38h)(AGT[3:0]=8, page 8) ................................................................................................ 42
9.2.78 ROMP9 (Address: 38h)(AGT[3:0]=9, page 9) ................................................................................................ 42
9.2.79 ROMP10 (Address: 38h)(AGT[3:0]=10, page 10) .......................................................................................... 43
9.2.80 ROMP11 (Address: 38h)(AGT[3:0]=11, page 11)........................................................................................... 43
9.2.81 Data Rate Clock Register (Address: 39h) ...................................................................................................... 43
9.2.82 FCR Register (Address: 3Ah) ........................................................................................................................ 43
9.2.83 ARD Register (Address: 3Bh) ........................................................................................................................ 44
9.2.84 AFEP Register (Address: 3Ch) ...................................................................................................................... 44
9.2.85 FCB Register (Address: 3Dh) ........................................................................................................................ 45
9.2.86 KEYC Register (Address: 3Eh) ...................................................................................................................... 45
9.2.87 USID Register (Address: 3Fh) ....................................................................................................................... 46
9.2.88 DSSS4 Register (Address: 20h)(AGT[3:0]=4, page 4) .................................................................................. 46
9.2.89 EXT1 Register (Address: 21h)(AGT[3:0]=6, page 6) ..................................................................................... 46
9.2.90 EXT2 Register (Address: 21h)(AGT[3:0]=8, page 8) ..................................................................................... 46
9.2.91 EXT3 Register (Address: 21h)(AGT[3:0]=9, page 9) ..................................................................................... 46
9.2.92 EXT4 Register (Address: 21h)(AGT[3:0]=10, page 10) ................................................................................. 47
9.2.93 EXT5 Register (Address: 21h)(AGT[3:0]=11, page 11) .................................................................................. 47
9.2.94 EXT6 Register (Address: 21h)(AGT[3:0]=12, page 12) ................................................................................. 47
9.2.95 EXT7 Register (Address: 22h)(AGT[3:0]=1, page 1) ..................................................................................... 48
9.2.96 EXT8 Register (Address: 22h) (AGT[3:0]=2, page 2) .................................................................................... 48
9.2.97 EXT9 Register (Address: 22h) (AGT[3:0]=3, page 3) .................................................................................... 48
9.2.98 EXT10 Register (Address: 22h) (AGT[3:0]=4, page 4) .................................................................................. 48
9.2.99 EXT11 Register (Address: 22h) (AGT[3:0]=5, page 5) .................................................................................. 49
10. SPI .................................................................................................................................................................................... 50
10.1 SPI Format............................................................................................................................................................... 51
10.2 SPI Timing Characteristic ........................................................................................................................................ 51
10.3 SPI Timing Chart ...................................................................................................................................................... 52
10.3.1 Timing Chart of 3-wire SPI ............................................................................................................................. 52
10.3.2 Timing Chart of 4-wire SPI ............................................................................................................................. 52
10.4 Strobe Commands ................................................................................................................................................... 53
10.4.1 Strobe Command - Sleep Mode .................................................................................................................... 53
10.4.2 Strobe Command - ldle Mode ........................................................................................................................ 54
10.4.3 Strobe Command - Standby Mode ................................................................................................................ 54
AMICCOM CONFIDENTIAL
![](https://csdnimg.cn/release/download_crawler_static/87243623/bg4.jpg)
A5133
5.8GHz 15dBm FSK Transceiver
Jul., 2022, Version 0.8 (Preliminary) 4 AMICCOM Electronics Corporation
10.4.4 Strobe Command - PLL Mode ....................................................................................................................... 55
10.4.5 Strobe Command - RX Mode ........................................................................................................................ 55
10.4.6 Strobe Command - TX Mode ......................................................................................................................... 56
10.4.7 Strobe Command – FIFO Write Pointer Reset .............................................................................................. 56
10.4.8 Strobe Command – FIFO Read Pointer Reset .............................................................................................. 57
10.5 Reset Command ...................................................................................................................................................... 57
10.6 ID Accessing Command .......................................................................................................................................... 57
10.6.1 ID Write Command ........................................................................................................................................ 57
10.6.2 ID Read Command ........................................................................................................................................ 58
10.7 FIFO Accessing Command ...................................................................................................................................... 58
10.7.1 TX FIFO Write Command .............................................................................................................................. 58
10.7.2 Rx FIFO Read Command .............................................................................................................................. 59
11. State machine ................................................................................................................................................................... 60
11.1 Key states ................................................................................................................................................................ 61
11.2 FIFO mode ............................................................................................................................................................... 61
11.3 Direct mode .............................................................................................................................................................. 62
12. Crystal Oscillator ............................................................................................................................................................... 64
12.1 Use External Crystal ................................................................................................................................................ 64
12.2 Use External Clock .................................................................................................................................................. 64
13. System Clock .................................................................................................................................................................... 65
13.1 Data Rate Setting (4Mbps) ...................................................................................................................................... 65
13.2 Data Rate Setting (2Mbps) ...................................................................................................................................... 66
14. Transceiver LO Frequency ................................................................................................................................................ 67
14.1 LO Frequency Setting .............................................................................................................................................. 67
15. Calibration ......................................................................................................................................................................... 68
15.1 Calibration Procedure .............................................................................................................................................. 68
16. FIFO (First In First Out) ..................................................................................................................................................... 69
16.1 TX Packet Format in FIFO mode ............................................................................................................................. 69
16.1.1 Basic FIFO mode ........................................................................................................................................... 69
16.1.2 Advanced FIFO mode .................................................................................................................................... 70
16.2 Bit Stream Process in FIFO mode ........................................................................................................................... 70
16.3 Transmission Time ................................................................................................................................................... 71
16.4 Usage of TX and RX FIFO ....................................................................................................................................... 71
16.4.1 Easy FIFO ..................................................................................................................................................... 72
16.4.2 Segment FIFO ............................................................................................................................................... 73
17. ADC (Analog to Digital Converter) .................................................................................................................................... 75
17.1 RSSI Measurement ................................................................................................................................................. 75
18. Battery Detect ................................................................................................................................................................... 77
19. Auto-ack and auto-resend ................................................................................................................................................. 78
19.1 Basic FIFO plus auto-ack auto-resend .................................................................................................................... 78
19.2 Advanced FIFO plus auto-ack and auto-resend....................................................................................................... 79
19.3 WTR Behavior during auto-ack and auto-resend ..................................................................................................... 80
19.4 Examples of auto-ack and auto-resend ................................................................................................................... 81
20. RC Oscillator ..................................................................................................................................................................... 84
20.1 WOR Function ......................................................................................................................................................... 84
20.2 TWOR Function ....................................................................................................................................................... 85
21. AES128 Security Packet ................................................................................................................................................... 86
22. Application circuit .............................................................................................................................................................. 87
23. Abbreviations .................................................................................................................................................................... 88
24. Ordering Information ......................................................................................................................................................... 89
25. Package Information ......................................................................................................................................................... 90
26. Top Marking Information ................................................................................................................................................... 91
27. Reflow Profile .................................................................................................................................................................... 92
28. Tape Reel Information ....................................................................................................................................................... 93
29. Product Status .................................................................................................................................................................. 94
AMICCOM CONFIDENTIAL
![](https://csdnimg.cn/release/download_crawler_static/87243623/bg5.jpg)
A5133
5.8GHz 15dBm FSK Transceiver
Jul., 2022, Version 0.8 (Preliminary) 5 AMICCOM Electronics Corporation
1. General Description
A5133 is a low cost 5.8GHz band FSK transceiver. It supports data rate up to 4Mbps (FSK mode).
For packet handling, A5133 has built-in separated (64 bytes) TX/RX FIFO for data buffering and burst transmission, auto-ack
and auto-resend, CRC for error packet filtering, FEC (7,4 hamming code) for 1-bit data correction per code word, RSSI for
clear channel assessment, thermal sensor to monitor relative temperature, data whitening for data encryption / decryption. In
addition, A5133 has built-in AES128 co-processor (Advanced Encryption Standard) for advanced data encryption or
decryption which consists of the transformation of a 128-bit block into an encrypted 128-bit block. Those functions are very
easy to use while developing a wireless system.
A5133’s control registers are accessed via 3-wire or 4-wire SPI interface such as TX/RF FIFO, ID register, RSSI value,
frequency hopping and calibration procedures. Another one is the unique Strobe command via SPI to control power saving
mode (sleep, idle, standby), TX mode and RX mode. The other connections between A5133 and MCU are GIO1 and GIO2
(multi-function GPIO) to output A5133’s status so that MCU could use either polling or interrupt scheme for radio control.
Overall, it is very easy to develop a wireless application by a MCU and A5133 because of its rich and easy-to-use features.
2. Typical Applications
HiFi quality wireless audio streaming
Video streaming
5.8GHz band system
Wireless toys and game controllers
AMICCOM CONFIDENTIAL
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