MPEG4的编解码实现

////////////////////////////////////////////////////////////////////////////// // // fdctmm32.c - AP922 MMX fDCT // ---------- // Intel Application Note AP-922 - fast, precise implementation of DCT // http://developer.intel.com/vtune/cbts/appnotes.htm // ---------- // // This code will run on any MMX CPU. The dct_row operation can be // further optimized using PentiumIII/Athlon instructions (pshufw.) // If the code will be run on a 3D-Now CPU (AMD K6-2/Athlon), a slight // accruacy-boost can be obtained. Please see fdctam32.c for details. // // For a fast, precise MMX implementation of inverse-DCT // visit http://www.elecard.com/peter // or check out Avery Lee's Virtualdub source-code // http://www.concentric.net/~psilon // // Revision history // ---------------- // // v1.01 08/26/2000 (clipper bugfix) // In my haste to get this code out the door, I neglected to consider // the numerical range of output. I *believe* an IEEE-1180/1990 fdct // is range-limited to {-2048, +2047}. // fdctmm32.c now saturates the output DCT coefficients to this range. // A few comment typos were corrected. Equivalent-C code for // the forward_dct column stage has also been added. The pseudo-C // code in Intel's AP-922 omits several important operations that // would cause dct8_frw_col() to fail, if it were used directly without // modification. // There is still room for additional optimization in the // frw_dct_row_mmx() function. The data pack/unpack operation could be // shortened with pshufw. // // v1.0 07/20/2000 (initial release) // Initial release of AP922 MMX forward_DCT. // // // liaor@iname.com http://members.tripod.com/~liaor ////////////////////////////////////////////////////////////////////////////// #define INP eax // pointer to (short *blk) #define OUT ecx // pointer to output (temporary store space qwTemp[]) #define TABLE ebx // pointer to tab_frw_01234567[] #define TABLEF ebx // pointer to tg_all_16 #define round_frw_row edx //#define round_frw_col edx #define x0 INP + 0*16 #define x1 INP + 1*16 #define x2 INP + 2*16 #define x3 INP + 3*16 #define x4 INP + 4*16 #define x5 INP + 5*16 #define x6 INP + 6*16 #define x7 INP + 7*16 #define y0 OUT + 0*16 #define y1 OUT + 1*16 #define y2 OUT + 2*16 #define y3 OUT + 3*16 #define y4 OUT + 4*16 #define y5 OUT + 5*16 #define y6 OUT + 6*16 #define y7 OUT + 7*16 ////////////////////////////////////////////////////////////////////// // // constants for the forward DCT // ----------------------------- // // Be sure to check that your compiler is aligning all constants to QWORD // (8-byte) memory boundaries! Otherwise the unaligned memory access will // severely stall MMX execution. // ////////////////////////////////////////////////////////////////////// #define BITS_FRW_ACC 3 //; 2 or 3 for accuracy #define SHIFT_FRW_COL BITS_FRW_ACC #define SHIFT_FRW_ROW (BITS_FRW_ACC + 17) // v1.01 The original SHIFT_FRW_ROW constant has been replaced by a // "two stage" shift operation. The 1st-shift (CLIP1) aligns the // intermediate 32-bit integer data to a {-32768, +32768} (16-bit word) // range. The MMX instruction "packssdw" simultaneous clips and packs // the intermediate-data into 16-bit format. // The 2nd-shift (CLIP2) restores the proper final range {-2048,+2047} #define SHIFT_FRW_ROW_CLIP2 (4) // 4-bit shift -> { 32768 <> 2048 } #define SHIFT_FRW_ROW_CLIP1 ( SHIFT_FRW_ROW - SHIFT_FRW_ROW_CLIP2 ) //#define RND_FRW_ROW (262144 * (BITS_FRW_ACC - 1)) //; 1 << (SHIFT_FRW_ROW-1) #define RND_FRW_ROW (1 << (SHIFT_FRW_ROW-1)) //#define RND_FRW_COL (2 * (BITS_FRW_ACC - 1)) //; 1 << (SHIFT_FRW_COL-1) #define RND_FRW_COL (1 << (SHIFT_FRW_COL-1)) const static __int64 one_corr = 0x0001000100010001; const static long r_frw_row[2] = {RND_FRW_ROW, RND_FRW_ROW }; //const static short tg_1_16[4] = {13036, 13036, 13036, 13036 }; //tg * (2<<16) + 0.5 //const static short tg_2_16[4] = {27146, 27146, 27146, 27146 }; //tg * (2<<16) + 0.5 //const static short tg_3_16[4] = {-21746, -21746, -21746, -21746 }; //tg * (2<<16) + 0.5 //const static short cos_4_16[4] = {-19195, -19195, -19195, -19195 }; //cos * (2<<16) + 0.5 //const static short ocos_4_16[4] = {23170, 23170, 23170, 23170 }; //cos * (2<<15) + 0.5 //concatenated table, for forward DCT-column transformation const static short tg_all_16[] = { 13036, 13036, 13036, 13036, // tg * (2<<16) + 0.5 27146, 27146, 27146, 27146, // tg * (2<<16) + 0.5 -21746, -21746, -21746, -21746, // tg * (2<<16) + 0.5 -19195, -19195, -19195, -19195, //cos * (2<<16) + 0.5 23170, 23170, 23170, 23170 }; //cos * (2<<15) + 0.5 #define tg_1_16 (TABLEF + 0) #define tg_2_16 (TABLEF + 8) #define tg_3_16 (TABLEF + 16) #define cos_4_16 (TABLEF + 24) #define ocos_4_16 (TABLEF + 32) // CONCATENATED IDCT COEFF TABLE, rows 0,1,2,3,4,5,6,7 (in order ) // /* static const short tab_inv_01234567[] = { // inverse_dct coeff table //row0, this row is required 16384, 16384, 16384, -16384, // ; movq-> w06 w04 w02 w00 21407, 8867, 8867, -21407, // w07 w05 w03 w01 16384, -16384, 16384, 16384, //; w14 w12 w10 w08 -8867, 21407, -21407, -8867, //; w15 w13 w11 w09 22725, 12873, 19266, -22725, //; w22 w20 w18 w16 19266, 4520, -4520, -12873, //; w23 w21 w19 w17 12873, 4520, 4520, 19266, //; w30 w28 w26 w24 -22725, 19266, -12873, -22725, //w31 w29 w27 w25 //row1 22725, 22725, 22725, -22725, // ; movq-> w06 w04 w02 w00 29692, 12299, 12299, -29692, // ; w07 w05 w03 w01 22725, -22725, 22725, 22725, //; w14 w12 w10 w08 -12299, 29692, -29692, -12299, //; w15 w13 w11 w09 31521, 17855, 26722, -31521, //; w22 w20 w18 w16 26722, 6270, -6270, -17855, //; w23 w21 w19 w17 17855, 6270, 6270, 26722, //; w30 w28 w26 w24 -31521, 26722, -17855, -31521, // w31 w29 w27 w25 //row2 21407, 21407, 21407, -21407, // ; movq-> w06 w04 w02 w00 27969, 11585, 11585, -27969, // ; w07 w05 w03 w01 21407, -21407, 21407, 21407, // ; w14 w12 w10 w08 -11585, 27969, -27969, -11585, // ;w15 w13 w11 w09 29692, 16819, 25172, -29692, // ;w22 w20 w18 w16 25172, 5906, -5906, -16819, // ;w23 w21 w19 w17 16819, 5906, 5906, 25172, // ;w30 w28 w26 w24 -29692, 25172, -16819, -29692, // ;w31 w29 w27 w25 //row3 19266, 19266, 19266, -19266, //; movq-> w06 w04 w02 w00 25172, 10426, 10426, -25172, //; w07 w05 w03 w01 19266, -19266, 19266, 19266, //; w14 w12 w10 w08 -10426, 25172, -25172, -10426, //; w15 w13 w11 w09 26722, 15137, 22654, -26722, //; w22 w20 w18 w16 22654, 5315, -5315, -15137, //; w23 w21 w19 w17 15137, 5315, 5315, 22654, //; w30 w28 w26 w24 -26722, 22654, -15137, -26722, //; w31 w29 w27 w25 //row4 16384, 16384, 16384, -16384, // ; movq-> w06 w04 w02 w00 21407, 8867, 8867, -21407, // w07 w05 w03 w01 16384, -16384, 16384, 16384, //; w14 w12 w10 w08 -8867, 21407, -21407, -8867, //; w15 w13 w11 w09 22725, 12873, 19266, -22725, //; w22 w20 w18 w16 19266, 4520, -4520, -12873, //; w23 w21 w19 w17 12873, 4520, 4520, 19266, //; w30 w28 w26 w24 -22725, 19266, -12873, -22725, //w31 w29 w27 w25 //row5 19266, 19266, 19266, -19266, //; movq-> w06 w04 w02 w00 25172, 10426, 10426, -25172, //; w07 w05 w03 w01 19266, -19266, 19266, 19266, //; w14 w12 w10 w08 -10426, 25172, -25172, -10426, //; w15 w13 w11 w09 26722, 15137, 22654, -26722, //; w22 w20 w18 w16 22654, 5315, -5315, -15137, //; w23 w21 w19 w17 15137, 5315, 5315, 22654, //; w30 w28 w26 w24 -26722, 22654, -15137, -26722, //; w31 w29 w27 w25 //row6 21407, 21407, 21407, -21407, // ; movq-> w06 w04 w02 w00 27969, 11585, 11585, -27969, // ; w07 w05 w03 w01 21407, -21407, 21407, 21407, // ; w14 w12 w10 w08 -11585, 27969, -27969, -11585,