NXP Semiconductors
UM10204
I
2
C-bus specification and user manual
1 Introduction
The I
2
C-bus is a de facto world standard that is now implemented in over 1000 different
ICs manufactured by more than 50 companies. Additionally, the versatile I
2
C-bus is
used in various control architectures such as System Management Bus (SMBus), Power
Management Bus (PMBus), Intelligent Platform Management Interface (IPMI), Display
Data Channel (DDC) and Advanced Telecom Computing Architecture (ATCA).
This document assists device and system designers to understand how the I
2
C-bus
works and implement a working application. Various operating modes are described. It
contains a comprehensive introduction to the I
2
C-bus data transfer, handshaking and bus
arbitration schemes. Detailed sections cover the timing and electrical specifications for
the I
2
C-bus in each of its operating modes.
Designers of I
2
C-compatible chips should use this document as a reference and ensure
that new devices meet all limits specified in this document. Designers of systems that
include I
2
C devices should review this document and also refer to individual component
data sheets.
Readers looking to develop I
2
C based solutions may also be interested in I3C, introduced
by the MIPI Alliance in 2017, with NXP's involvement and contributions. MIPI I3C offers
backward compatibility with I
2
C, increased speed and low power consumption, and a
royalty-free version is available for implementers. More information is included at the end
of this document in Section 9.
2 I
2
C-bus features
In consumer electronics, telecommunications and industrial electronics, there are often
many similarities between seemingly unrelated designs. For example, nearly every
system includes:
• Some intelligent control, usually a single-chip microcontroller
• General-purpose circuits like LCD and LED drivers, remote I/O ports, RAM, EEPROM,
real-time clocks or A/D and D/A converters
• Application-oriented circuits such as digital tuning and signal processing circuits for
radio and video systems, temperature sensors, and smart cards
To exploit these similarities to the benefit of both systems designers and equipment
manufacturers, as well as to maximize hardware efficiency and circuit simplicity, Philips
Semiconductors (now NXP Semiconductors) developed a simple bidirectional 2-wire
bus for efficient inter-IC control. This bus is called the Inter IC or I
2
C-bus. All I
2
C-bus
compatible devices incorporate an on-chip interface which allows them to communicate
directly with each other via the I
2
C-bus. This design concept solves the many interfacing
problems encountered when designing digital control circuits.
Here are some of the features of the I
2
C-bus:
• Only two bus lines are required; a serial data line (SDA) and a serial clock line (SCL).
• Each device connected to the bus is software addressable by a unique address and
simple controller/target relationships exist at all times; controllers can operate as
controller-transmitters or as controller-receivers.
• It is a true multi-controller bus including collision detection and arbitration to prevent
data corruption if two or more controllers simultaneously initiate data transfer.
UM10204 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 7.0 — 1 October 2021
3 / 62
评论0