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完整英文电子版 SAE J1938:2015 Product Development Process and Checklist for Vehicle Electronic Systems(车辆电子系统的产品开发流程和检查表)。由于不可能包罗万象并涵盖设计/验证过程的每个方面,因此本文档可用作准备更全面和详细计划的基础,以反映在特定公司积累的“经验教训”。 本文档涉及以下领域: 1. 当代观点,包括常见的验证问题和缺陷。 2. 基于 SAE J1211 手册和 SAE J2628 的稳健性验证 (RV) 过程。 3. 设计检查清单以协助这种 RV 过程。
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__________________________________________________________________________________________________________________________________________
SAE Technical Standards Board Rules provide that: “This report is published by SAE to advance the state of technical and engineering sciences. The use of this report is entirely
voluntary, and its applicability and suitability for any particular use, including any patent infringement arising therefrom, is the sole responsibility of the user.”
SAE reviews each technical report at least every five years at which time it may be revised, reaffirmed, stabilized, or cancelled. SAE invites your written comments and
suggestions.
Copyright © 2015 SAE International
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying,
recording, or otherwise, without the prior written permission of SAE.
TO PLACE A DOCUMENT ORDER: Tel: 877-606-7323 (inside USA and Canada)
Tel: +1 724-776-4970 (outside USA)
Fax: 724-776-0790
Email: CustomerService@sae.org
SAE WEB ADDRESS: http://www.sae.org
SAE values your input. To provide feedback
on this Technical Report, please visit
http://www.sae.org/technical/standards/J1938_201507
SURFACE VEHICLE
INFORMATION REPORT
J1938™
JUL2015
Issued 1988-10
Revised 2015-07
Superseding J1938 MAY1998
(R) Product Development Process and Checklist for Vehicle Electronic Systems
RATIONALE
This report is a major update to the original one dated 1998. It is much more comprehensive in its scope and detail. The
main purpose is to condense information from a number of sources relating to the design of electronic modules. It is
especially useful for some new players on the automotive electronics scene who may not know how to sort the “wheat from
the chaff” and what to focus on.
TABLE OF CONTENTS
1. SCOPE ................................................................................................................................................................... 4
2. REFERENCES ....................................................................................................................................................... 4
2.1 Applicable Documents ............................................................................................................................................ 4
2.1.1 SAE Publications .................................................................................................................................................... 4
2.1.2 Military Specifications (latest versions) ................................................................................................................... 4
2.2 Related Publications ............................................................................................................................................... 5
2.2.1 ISO Publications ..................................................................................................................................................... 5
2.2.2 CISPR Publications ................................................................................................................................................. 5
2.3 Other Publications ................................................................................................................................................... 5
2.4 Technical Papers .................................................................................................................................................... 5
2.5 Books, Handbooks .................................................................................................................................................. 6
3. CONTEMPORARY DESIGN/VALIDATION PERSPECTIVE ................................................................................. 6
3.1 Test Related Issues ................................................................................................................................................ 7
3.2 Test Effectiveness Example ................................................................................................................................... 7
3.3 Cost Reductions (CR) ............................................................................................................................................. 8
3.4 Trouble Not Indicated (TNI’s) .................................................................................................................................. 8
3.5 Sample Sizes .......................................................................................................................................................... 8
3.6 Reliability Prediction ................................................................................................................................................ 8
4. ROBUSTNESS VALIDATION (RV) PROCESS ..................................................................................................... 9
4.1 Preliminary Assessment. ...................................................................................................................................... 10
4.2 Development Stage .............................................................................................................................................. 10
4.2.1 General ................................................................................................................................................................. 10
4.2.2 SAE J2628 (Characterization, Conducted Immunity) Summary .......................................................................... 12
4.3 Design Validation (DV) Readiness Evaluation ..................................................................................................... 12
4.4 Design Validation (DV).......................................................................................................................................... 12
4.5 Product Validation (PV)......................................................................................................................................... 13
4.6 Conformity, TNI ..................................................................................................................................................... 13
4.7 Example of RV Process Results ........................................................................................................................... 14
5. DESIGN CHECKLIST FOR MODULES ............................................................................................................... 14
5.1 Component Selection/Application ......................................................................................................................... 14
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SAE INTERNATIONAL J1938™ Revised JUL2015 Page 2 of 31
5.2 Components, Specific Devices ............................................................................................................................. 15
5.2.1 Resistors ............................................................................................................................................................... 15
5.2.2 Capacitors ............................................................................................................................................................. 15
5.2.3 Connectors/Interconnects ..................................................................................................................................... 15
5.2.4 Printed Circuit Boards (PCB's), General ............................................................................................................... 15
5.2.5 Thick film substrates ............................................................................................................................................. 17
5.2.6 Transistors, Diodes, MOSFET's ........................................................................................................................... 17
5.2.7 Linear (Op Amps, etc) ........................................................................................................................................... 17
5.2.8 Digital (microprocessors, etc.) .............................................................................................................................. 18
5.3 Circuit Design Checklist ........................................................................................................................................ 18
5.3.1 General ................................................................................................................................................................. 18
5.3.2 Module Inputs ....................................................................................................................................................... 19
5.3.3 Module Outputs ..................................................................................................................................................... 20
5.3.4 Power Supply Related .......................................................................................................................................... 20
5.3.5 Electrical overstress .............................................................................................................................................. 20
5.3.6 Circuit Tolerance/Analysis .................................................................................................................................... 21
5.4 Software ................................................................................................................................................................ 21
5.5 Diagnostics ........................................................................................................................................................... 22
5.6 Repairability .......................................................................................................................................................... 22
5.7 Environmental (Non EMC) .................................................................................................................................... 22
5.7.1 General ................................................................................................................................................................. 22
5.7.2 Thermal Considerations (Components/Assemblies) ............................................................................................ 22
5.7.3 Vibration/Shock Considerations (Components/Assembly .................................................................................... 23
5.7.4 Humidity/Splash/Dust Considerations (Components/Assemblies) ....................................................................... 23
5.7.5 Burn In * ................................................................................................................................................................ 24
5.8 Electromagnetic Compatibility (EMC) ................................................................................................................... 24
5.8.1 Component (Module) Level .................................................................................................................................. 24
5.8.2 PCB Layout Rules for EMC .................................................................................................................................. 25
5.9 Miscellaneous Manufacturing Process Checklist. ................................................................................................ 29
6. NOTES .................................................................................................................................................................. 30
6.1 Revision Indicator ................................................................................................................................................. 30
APPENDIX A Example of thermal cycle Accelerated Test ................................................................................................. 31
Figure 1 Relative Contributions ............................................................................................................................................. 3
Figure 4.1 Design margin plot from J2628 ..................................................................................................................... 12
Figure 5.1 Sine approximation of pulse train ................................................................................................................. 25
Figure 5.2 Filter example ............................................................................................................................................... 27
Figure 5.3 IC cap layout ................................................................................................................................................. 27
Figure 5.4 Example BGA with multiple powers .............................................................................................................. 28
Figure 5.5 IC development layout .................................................................................................................................. 28
Figure 5.6 Simplified switching power supply schematic ............................................................................................... 29
Table 4.1 Development tests ........................................................................................................................................ 11
Table 4.2 Actual example of time savings using RV process (radio) ........................................................................... 14
Table 5.1 Grid inductance ............................................................................................................................................. 26
Table A.1 Temperature profile ...................................................................................................................................... 31
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SAE INTERNATIONAL J1938™ Revised JUL2015 Page 3 of 31
FOREWARD
The traditional approach to electronic system product development and validation is inherently not capable of finding many
contemporary issues. The degree of analysis, modeling, simulation, testing and experience of the design/test staff varies
widely among different OEM’s and vendors. Another major part of product development is validation in a number of areas
such as Functionality, Electromagnetic Compatibility (EMC) and Environmental testing. Although much time and expense
is spent, using traditional approaches often leads to “feel good” results since the product “passes”. Such a false sense of
security is misleading since such validation methods can have serious deficiencies. These deficiencies may prevent
detection of the types of concerns that exist in today's automotive electronic products.
Many specs were written when automotive electronics was not mature (lots of issues). Environmental and EMC specs
evolved over many years (lots of baggage, old practices). These test methods have many limitations and compromises not
appreciated by contemporary practitioners - simple pass-fail criteria can result in non-value work (test issues that are not
real world concerns).
System Pareto Analysis - Top 3 Root Causes (mature OEM, Vendor). See Figure
1. Requirements not correct or unspecified (“Unrequirements”)
2. System-Interface Issues
3. Trouble Not Indicated (TNI)
Many processes focus on D & E instead of top 3. Environmental Specs are wear out mechanism oriented - focused on
component, solder joint and mechanical reliability. Major advances in component reliability, design-process maturity and
solder capability have placed these down on Pareto List.
Figure 1 - Relative contributions
To provide information on a robust design process, a Handbook for Robustness Validation (SAE J1211) was recently
published. It was developed by approximately 40 experts in the field (European and American).
It can be summarized by this quote from the SAE J1211 handbook.
“Robustness Validation relies first on knowledge-based modeling simulation and analysis methods to develop a highly
capable design prior to building and testing physical parts; and then on test-to-failure (or acceptable degradation) and
failure/defect susceptibility testing to confirm or identify robustness margins, to enable failure prediction and verify that
manufacturing processes produce defect free parts. These techniques represent advancement beyond “test-to-pass”
qualification plans which usually provide very little useful engineering information about failure modes, failure mechanisms
and failure points”.
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SAE INTERNATIONAL J1938™ Revised JUL2015 Page 4 of 31
To obtain a high degree of quality and reliability, a wide variety of subjects needs to be addressed when designing a vehicle
electronic system. No single designer can be expected to have the experience necessary to consider all aspects of a
design. Such experience is often spread throughout an organization and not concentrated on any one project. This report
is meant to condense information from a number of sources to improve the quality and reliability of automotive electronics.
1. SCOPE
Since it is impossible to be all inclusive and cover every aspect of the design/validation process, this document can be used
as a basis for preparation of a more comprehensive and detailed plan that reflects the accumulated "lessons learned" at a
particular company. The following areas are addressed in this document:
1. Contemporary perspective including common validation issues and flaws.
2. A Robustness Validation (RV) process based on SAE J1211 handbook and SAE J2628.
3. Design checklists to aid in such a RV process.
2. REFERENCES
2.1 Applicable Documents
The following publications form a part of this specification to the extent specified herein. Unless otherwise indicated, the
latest issue of SAE publications shall apply.
2.1.1 SAE Publications
Available from SAE International, 400 Commonwealth Drive, Warrendale, PA 15096-0001, Tel: 877-606-7323 (inside USA
and Canada) or +1 724-776-4970 (outside USA), www.sae.org.
SAE J551 Performance Levels and Methods of Measurement of Electromagnetic Radiation from Vehicles and
Devices (30 to 1000 MHz)
SAE J1113 Electromagnetic Susceptibility Measurement Procedures for Vehicle Components (Except Aircraft)
SAE J1211 Handbook for Robustness Validation of Automotive Electrical/Electronic Modules
SAE J1455 Recommended Environmental Practices for Electronic Equipment Design in Heavy-Duty Vehicle
Applications
SAE J1879 Handbook for Robustness Validation of Semiconductor Devices in Automotive Applications
SAE J2628 Characterization, Conducted Immunity
2.1.2 Military Specifications (latest versions)
Available from DODSSP, Subscripton Services Desk, Building 4D, 700 Robins Avenue, Philadelphia, PA 19111-5094.
Mil-Std 202 Test Methods for Electronic and Electrical Component Parts
Mil-Std 810 Environmental Test Methods and Engineering Guidelines
Mil-Std 461 Requirements for the Control of Electromagnetic Interference Characteristics of Subsystems and
Equipment.
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SAE INTERNATIONAL J1938™ Revised JUL2015 Page 5 of 31
2.2 Related Publications
The following publications are provided for information purposes only and are not a required part of this SAE Technical
Report.
2.2.1 ISO Publications
Available from American National Standards Institute, 25 West 43rd Street, 4th Floor, New York, NY 10036, Tel: 212-642-
4900, www.ansi.org.
ISO 11451 Vehicle Methods for Electrical Disturbances from Narrowband Radiated Electromagnetic Energy.
ISO 11452 Electrical Disturbances by Narrowband Radiated Electromagnetic Energy, Component Test Methods.
ISO 10605 Test Methods for Electrical Disturbances from Electrostatic Discharges.
ISO 16750 Environmental Conditions and Testing for Electrical and Electronic Equipment.
ISO 7637 Electrical Disturbance by Conduction and Coupling.
2.2.2 CISPR Publications
Available from American National Standards Institute, 25 West 43rd Street, 4th Floor, New York, NY 10036, Tel: 212-642-
4900, www.ansi.org.
CISPR 25 Vehicles, Boats and Internal Combustion Engines, Radio Disturbance Characteristics, Limits and Methods
of Measurement for the Protection of On-Board Receivers.
2.3 Other Standards
JEDEC (Joint Electron Device Engineering Council)Standards on electronic components, consumer electronics, electronic
information, telecommunications, and internet security.
AEC (Automotive Electronics Council) Q100 (Failure Mechanism Based Stress Test Qualification for Integrated Circuits),
Q101 (Failure Mechanism Based Stress Test Qualification for Discrete Semiconductors in Automotive Applications), Q200
(Stress Test Qualification for passive Components) and other standards.
2.4 Technical Papers
1. IEEE EMC Symposium 2005, Comparison of ISO 7637 Transient Waveforms to Real World Automotive Transient
Phenomena
2. Electrostatic Discharge Analysis of Multi-Layer Ceramic Capacitors, Cyrous Rostamzadeh , Hamidreza Dadgostar,
Flavio Canavero, 2009 IEEE EMC Symposium.
3. Temperature and Voltage Variation of Ceramic Capacitors, or Why Your 4.7μF Capacitor Becomes a 0.33μF Capacitor,
Mark Fortunato, Senior Principal Member of Technical Staff Maxim Integrated Products, Tutorial 5527
4. SAE 2009 - 01- 0294, Avoiding Electrical Overstress for Automotive Semiconductors by New Connecting Concepts,
Christoph Thienel, Robert Bosch GmbH, Germany
5. A Fundamental Overview of Accelerated Testing Analytical Models, Hank Caruso, Abhijit Dasgupta, University of
Maryland CALCE Center, College Park, Maryland, Journey of the Institute of IEST, Jan/Feb 1998, 1998 Proceedings
Annual Reliability and Maintainability Symposium.
6. Comparison of Flex Cracking of Multilayer Ceramic Capacitors Assembled with Lead-Free and Eutectic Tin-Lead
Solders, Mohammadreza Keimasi1, Michael H. Azarian, and Michael Pecht
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