dip-switch -microblaze-dip-switch-microblaze.zip

Release 10.1.03 - par K.39 (nt) Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. Wed Sep 23 16:27:12 2009 INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are: 1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors. 2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information. 3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator. INPUT FILE: system_map.ncd OUTPUT FILE: system_pad.txt PART TYPE: xc3sd1800a SPEED GRADE: -4 PACKAGE: fg676 Pinout by Pin Number: +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ |Pin Number|Signal Name |Pin Usage |Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage |Constraint|DCI Value|IO Register|Signal Integrity| +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ |A1 | | |GND | | | | | | | | | | | | | |A2 | | |PROG_B | | | | | | | | | | | | | |A3 | |DIFFMTB |IO_L51P_0 |UNUSED | |0 | | | | | | | | | | |A4 | |DIFFMTB |IO_L45P_0 |UNUSED | |0 | | | | | | | | | | |A5 |fpga_0_DIP_Switches_8Bit_GPIO_in_pin<1>|IBUF |IP_0 |INPUT |LVTTL |0 | | | |IBUF | |LOCATED | |NO |NONE | |A6 | | |GND | | | | | | | | | | | | | |A7 |fpga_0_DIP_Switches_8Bit_GPIO_in_pin<7>|IBUF |IP_0 |INPUT |LVTTL |0 | | | |IBUF | |LOCATED | |NO |NONE | |A8 | |DIFFMTB |IO_L38P_0 |UNUSED | |0 | | | | | | | | | | |A9 | |DIFFMTB |IO_L36P_0 |UNUSED | |0 | | | | | | | | | | |A10 | |DIFFMTB |IO_L33P_0 |UNUSED | |0 | | | | | | | | | | |A11 | | |GND | | | | | | | | | | | | | |A12 | |DIFFMTB |IO_L29P_0 |UNUSED | |0 | | | | | | | | | | |A13 | |IBUF |IP_0 |UNUSED | |0 | | | | | | | | | | |A14 | |DIFFSTB |IO_L26N_0/GCLK7 |UNUSED | |0 | | | | | | | | | | |A15 | |DIFFSTB |IO_L23N_0 |UNUSED | |0 | | | | | | | | | | |A16 | | |GND | | | | | | | | | | | | | |A17 | |IBUF |IP_0 |UNUSED | |0 | | | | | | | | | | |A18 | |DIFFSTB |IO_L18N_0 |UNUSED | |0 | | | | | | | | | | |A19 | |DIFFSTB |IO_L15N_0 |UNUSED | |0 | | | | | | | | | | |A20 | |DIFFSTB |IO_L14N_0 |UNUSED | |0 | | | | | | | | | | |A21 | | |GND | | | | | | | | | | | | | |A22 | |DIFFSTB |IO_L07N_0 |UNUSED | |0 | | | | | | | | | | |A23 |fpga_0_DIP_Switches_8Bit_GPIO_in_pin<0>|IBUF |IP_0 |INPUT |LVTTL |0 | | | |IBUF | |LOCATED | |NO |NONE | |A24 | |IBUF |IP_0 |UNUSED | |0 | | | | | | | | | | |A25 | | |TCK | | | | | | | | | | | | | |A26 | | |GND | | | | | | | | | | | | | |AA1 | | |GND | | | | | | | | | | | | | |AA2 | |DIFFMLR |IO_L55P_3 |UNUSED | |3 | | | | | | | | | | |AA3 | |DIFFSLR |IO_L55N_3 |UNUSED | |3