TS101的连路口程序，基于visual DSP++环境开发 该程序时c语言程序.zip

**************************************************************************** ADSP-TS101S EZ-Kit Link Boot routine Sets up slave (DSPA) in link boot mode and the master (DSPB) boots the slave via link port 3 with the example IIR code using bootdata.ldr. The project Bootdata to create bootdata.ldr is also attached. Analog Devices, Inc. DSP Division Three Technology Way P.O. Box 9106 Norwood, MA 02062 JULY-2002 BL This directory contains an example ADSP-TS101S subroutines that implement link port boot. Files contained in this directory: ADSP-TS101_MP.ldf Linker description file for Link Boot project Link_ldr.dpj VisualDSP project file for Link Boot project Link_ldr.mak VisualDSP Make file for Link Boot project SlaveDSPA.asm Source file for DSPA for Link Boot project SlaveDSPA.DXE Executable file for DSPA for Link Boot project MasterDSPB.asm Source file for DSPB for Link Boot project MasterDSPB.DXE Executable file for DSPB for Link Boot project ADSP-TS101_ASM.ldf Linker description file for Bootdata project bootdata.dpj VisualDSP project file for Bootdata project bootdata.mak VisualDSP Make file for Bootdata project iir.asm Source file for Bootdata project - example IIR Variables.asm Source file containing variable declarations for Bootdata project IIRDef.h Define file for Bootdata project indata.dat IIR Input data file for Bootdata project coeffs.dat IIR Coefficients data file for Bootdata project TSEZKitDef.h TS101S EZ-Kit define file README_ASM_LINKBOOT.txt This README file _________________________________________________________________ CONTENTS I. SLAVE CODE (SlaveDSPA) DESCRIPTION II. MASTER CODE (MasterDSPB) DESCRIPTION III. BOOTED IIR CODE (bootdata) DESCRIPTION IV. RUNNING PROJECT DESCRIPTION I. SLAVE CODE (SlaveDSPA) DESCRIPTION The Slave code is in SlaveDSPA.asm. Normally, when the TigerSHARC is to be booted from a link port, it is at IDLE with all the link DMAs enabled to move 256 words of data from link port to internal memory locations 0x00000000-0x000000ff. Since in this example the slave would already have been interrupted out of IDLE (via either a PROM boot or an emulation interrupt), SlaveDSPA is designed to send the chip into a state identical to power-on state before a link boot. It initializes link port DMAs to move 256 words of data from a link port to internal memory locations 0x00000000-0x000000ff and then interrupt to location 0x00000000. After the DMA initializations, the processor sits at IDLE waiting for the master to boot it. II. MASTER CODE (MasterDSPB) DESCRIPTION MasterDSPB.asm contains the master code that boots the slave (DSPA). The code delays for some time to insure that the slave is ready (since in this case, unlike a generic link boot, the slave actually needs to run the SlaveDSPA code) and then simply sends the data from bootdata.ldr to link port 3. The link port choice is partially arbitrary, the boot will work just as well for other link ports with the following guidelines: a. The link boot loader kernel file TS101_link.asm located in C:\Program Files\Analog Devices\VisualDSP\Ts\ldr directory has to be modified to use the same link port (done via a #define statement in the source code of TS101_link.asm), its project TS101_link.dpj has to be re-built. Then bootdata.dpj project (see part III below) has to be re-built so that it uses the newly modified kernel. Finally, MasterDSPB.asm has to be modified (via #define in the source) to use this link port and the entire Link_ldr.dpj re-built. b. Only link ports 2 and 3 are connected between the DSPs on the EZ-Kit. If link port 0 or 1 is selected, a link port cable connecting the appropriate external connectors will have to be used. For more information consult the EZ-Kit User's Manual. III. BOOTED IIR CODE (bootdata) DESCRIPTION This code is build in the project bootdata.dpj, its source is in iir.asm. The iir filters data contained in indata.dat with filter coefficients in coeffs.dat. Details of the filtering algorithm are irrelevant to link boot which is the primary target of this demo. These details can be read in the comments of the source file iir.asm. This project selects (in the Project Options) Loader file as the Project type and Link as the boot type. The kernel file points to C:\Program Files\Analog Devices\VisualDSP\Ts\ldr\TS101_link.dxe. IV. RUNNING PROJECT DESCRIPTION Load the project into the EZ-Kit through emulation, SlaveDSPA into DSPA and MasterDSPB into DSPB. Execute Debug -> Multiprocessor -> Run. Execute Debug -> Multiprocessor -> Stop. The slave (DSPA) will have booted and executed the filtering code in the IIR. While the focus in on the DSPA, execute File -> Load Symbols and select bootdata.dxe. This will load the symbols for the IIR. You can now plot and examine input and output of the IIR. Project options: ================ Please refer to the VisualDSP++ release notes and the TS101S anomaly listing for full details of the following switch usage, operation and silicon revision requirements Assembler/Compiler switches to be used in the assembler and compiler property pages' Additional Options fields '-default-branch-np' Required for TS101S Rev 0.1 silicon. Use in BOTH compiler AND Assembler property page 'Additional Options' field. "-align-branch-lines' Required for TS101S Rev 0.1 and 0.2 silicon". Although a specific example may not contain a "jump(P)", to keep generality the switch is required for all silicon versions. Use only in Assembler property page 'Additional Options' field. If any example code projects are built/rebuilt for the above mentioned silicon revisions, these switches must be used. The same holds true for user created code sets.