/*---------------------------------------------------------------------------------------------------------*/
/* */
/* Copyright(c) 2017 Nuvoton Technology Corp. All rights reserved. */
/* */
/*---------------------------------------------------------------------------------------------------------*/
//***********************************************************************************************************
// Website: http://www.nuvoton.com
// E-Mail : MicroC-8bit@nuvoton.com
// Date : Jan/21/2017
//***********************************************************************************************************
//***********************************************************************************************************
// File Function: N76E003 Timer2 Capture Mode demo code
//***********************************************************************************************************
#include "N76E003.h"
#include "Common.h"
#include "Delay.h"
#include "SFR_Macro.h"
#include "Function_define.h"
//***************** The Following is in define in Fucntion_define.h ***************************
//****** Always include Function_define.h call the define you want, detail see main(void) *******
//***********************************************************************************************
#if 0
///*----------------------------------------------------------------------------------------------------------
//* Capture Pin Selection Define
//----------------------------------------------------------------------------------------------------------*/
////--- Falling Edge -----
//#define IC0_P12_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0
//#define IC1_P11_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x01;
//#define IC2_P10_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x02;
//#define IC3_P00_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x03;
//#define IC3_P04_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x04;
//#define IC4_P01_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x05;
//#define IC5_P03_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x06;
//#define IC6_P05_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x07;
//#define IC7_P15_CAP0_FallingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x08;
//#define IC0_P12_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F
//#define IC1_P11_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x10;
//#define IC2_P10_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x20;
//#define IC3_P00_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x30;
//#define IC3_P04_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x40;
//#define IC4_P01_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x50;
//#define IC5_P03_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x60;
//#define IC6_P05_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x70;
//#define IC7_P15_CAP1_FallingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x80;
//#define IC0_P12_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0
//#define IC1_P11_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x10;
//#define IC2_P10_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x20;
//#define IC3_P00_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x30;
//#define IC3_P04_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x40;
//#define IC4_P01_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x50;
//#define IC5_P03_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x60;
//#define IC6_P05_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x70;
//#define IC7_P15_CAP2_FallingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x80;
////----- Rising edge ----
//#define IC0_P12_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0
//#define IC1_P11_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x01;
//#define IC2_P10_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x02;
//#define IC3_P00_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x03;
//#define IC3_P04_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x04;
//#define IC4_P01_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x05;
//#define IC5_P03_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x06;
//#define IC6_P05_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x07;
//#define IC7_P15_CAP0_RisingEdge_Capture CAPCON0|=SET_BIT4;CAPCON1=0x00;CAPCON1|=0x01;CAPCON2|=SET_BIT4;CAPCON3&=0xF0;CAPCON3|=0x08;
//#define IC0_P12_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F
//#define IC1_P11_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x10;
//#define IC2_P10_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x20;
//#define IC3_P00_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x30;
//#define IC3_P04_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x40;
//#define IC4_P01_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x50;
//#define IC5_P03_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x60;
//#define IC6_P05_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x70;
//#define IC7_P15_CAP1_RisingEdge_Capture CAPCON0|=SET_BIT5;CAPCON1=0x00;CAPCON1|=0x04;CAPCON2|=SET_BIT5;CAPCON3&=0x0F;CAPCON3|=0x80;
//#define IC0_P12_CAP3_RisingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON1|=0x10;CAPCON2|=SET_BIT6;CAPCON4&=0xF0
//#define IC1_P11_CAP3_RisingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON1|=0x10;CAPCON2|=SET_BIT6;CAPCON4&=0xF0;CAPCON4|=0x01;
//#define IC2_P10_CAP3_RisingEdge_Capture CAPCON0|=SET_BIT6;CAPCON1=0x00;CAPCON1|=0x10;CAPCON2|=SET_BIT6;CAPCON4&=0x
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新唐N76E003单片机开发板硬件参考设计原理图+软件实验例程源码合集(38个)+BSP Guide文档.zip
共1036个文件
lst:252个
obj:224个
m51:63个
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新唐N76E003单片机开发板硬件参考设计原理图+软件实验例程源码合集(38个)+BSP Guide文档: Common Include NUTINY-SDK-N76E003 参考设计原理图.pdf Nuvoton_N76E003_BSP_Revision_History_v1.01.pdf RM_N76E003 CMSIS BSP Guide v1.01.pdf Sample_Code(38个): ADC_Bandgap ADC_IO_Trig ADC_PWM_Trig ADC_Simple Clock_Out Fsys_Select GPIO I2C_EEPROM I2C_Master-Slave IAP_AP-program-AP_Dataflash IAP_AP-program-LD IAP_Dataflash_EEPROM IAP_LD-Program-AP IAP_MoidfyHIRC IAP_program_Config IAP_Read_Bandgap IAP_Read_UID Pin_Interrupt PWM_DeadTime PWM_INT PWM_Simple
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新唐N76E003单片机开发板硬件参考设计原理图+软件实验例程源码合集(38个)+BSP Guide文档.zip (1036个子文件)
UID_check.__b 120B
UID_check.__b 120B
UID_check.__b 120B
Version.__i 178B
xRAM_768byte.__i 140B
xRAM_256.__i 128B
testw77.__i 125B
STARTUP_N76E003beta.A51 6KB
STARTUP.A51 5KB
ADC 193KB
ADC 193KB
ADC 162KB
ADC_Bandgap 244KB
ADC_IO 162KB
ADC_PWM 163KB
ADC_Simple 242KB
ADC_Simple 161KB
GPIO.uvgui.Administrator 137KB
I2C_EEPROM.uvgui.Administrator 137KB
SPI_Flash.uvgui.Administrator 69KB
I2C_Slave.uvgui_gary.bak 139KB
GPIO.uvgui_Administrator.bak 137KB
I2C_EEPROM.uvgui_Administrator.bak 137KB
I2C_Slave.uvgui_chtien1.bak 132KB
Timer01_m3.uvgui_LCWANG0.bak 71KB
GPIO_uvproj.bak 14KB
I2C_Slave_uvproj.bak 14KB
SPI_Flash_uvproj.bak 14KB
I2C_EEPROM_uvproj.bak 14KB
I2C_Slave_uvopt.bak 8KB
I2C_EEPROM_uvopt.bak 8KB
GPIO_uvopt.bak 7KB
SPI_Flash_uvopt.bak 7KB
run.bat 18B
isp_ld.bin 2KB
WDT.bin 242B
Capture.c 15KB
I2C_EEPROM.c 13KB
I2C_EEPROM.c 12KB
PWM.C 9KB
I2C_M.c 8KB
PWM.c 8KB
PWM.c 8KB
SPI_Flash.c 7KB
Pin_Int.C 7KB
GPIO.C 7KB
ISP_LD-AP.c 7KB
IAP_DATAFLASH.c 7KB
IAP_DATAFLASH.c 7KB
SPI_Master_Int.c 7KB
IAP_APproLD.c 7KB
ADC.C 7KB
SPI_Slave_Int.c 6KB
SPI_Master_Po.c 6KB
SPI_Slave_Po.c 5KB
ADC.C 5KB
Timer01_M1.c 5KB
Delay.c 5KB
ADC.C 5KB
I2C_S.c 5KB
ADC.C 4KB
Common.c 4KB
Capture.c 4KB
Timer01_M3.c 4KB
IAP_BYTE.c 4KB
Timer01_M0.c 4KB
Timer01_M2.c 4KB
UART1.c 4KB
Fsys_SEL.c 3KB
WDT.c 3KB
UART0.c 3KB
WDT.c 3KB
UART0_mode_3.c 3KB
WKT_INT.c 2KB
Timer3.c 2KB
IAP_MHIRC.C 2KB
IAP_RBGtrim.C 2KB
CLK_OUT.c 2KB
UID_check.C 2KB
xRAM_768byte.c 1KB
UID_check.C 858B
UID_check.C 679B
Capture 196KB
Capture 163KB
I2C_Slave.uvgui.chtien1 132KB
CLK_OUT 189KB
CLK_OUT 160KB
I2C_Slave.uvgui.CYCHANG0 70KB
hex2bin.exe 28KB
FSYS_SEL 243KB
I2C_Slave.uvgui.gary 139KB
GPIO 244KB
SFR_Macro.h 48KB
Function_Define.h 39KB
N76E003.h 6KB
Common.h 1KB
Timer01.h 863B
Timer01.h 863B
Timer01.h 863B
Timer01.h 863B
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