<html>
<head>
<META http-equiv="Content-Type" content="text/html">
<style type="text/css">
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font-family : sans-serif;
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</style>
</head>
<body>
<img ALT="Altium" src="file://C:\PROGRAM FILES (X86)\ALTIUM DESIGNER WINTER 09\Templates\AD-rgb_logo_223x64.gif">
<a href="dxpprocess://Client:SetupPreferences?Server=PCB|PageName=General" class="customize"><acronym title="dxpprocess://Client:SetupPreferences?Server=PCB|PageName=General">Reporting Options</acronym></a>
<h1>File in Previous Format</h1>
<table class="front_matter">
<tr class="front_matter">
<td class="front_matter_column1">Date</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3">2018/2/5</td>
</tr>
<tr class="front_matter">
<td class="front_matter_column1">Time</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3">11:31:17</td>
</tr>
<tr class="front_matter">
<td class="front_matter_column1">Filename</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3"><a href="file://D:\[05]其他资源\新建文件夹\[430]SEP4020 核心板+开发板PROTEL DXP设计硬件原理图+PCB文件\[430]SEP4020 核心板+开发板PROTEL DXP设计硬件原理图+PCB文件\UB4020MBT(V1.0)\UB4020MBT(V1.0).PCB" class="file"><acronym title="D:\[05]其他资源\新建文件夹\[430]SEP4020 核心板+开发板PROTEL DXP设计硬件原理图+PCB文件\[430]SEP4020 核心板+开发板PROTEL DXP设计硬件原理图+PCB文件\UB4020MBT(V1.0)\UB4020MBT(V1.0).PCB">D:\[05]其他资源\新建文件夹\[430]SEP4020 核心板+开发板PROTEL DXP设计硬件原理图+PCB文件\[430]SEP4020 核心板+开发板PROTEL DXP设计硬件原理图+PCB文件\UB4020MBT(V1.0)\UB4020MBT(V1.0).PCB</acronym></a></td>
</tr>
</table>
<br>
<table>
<tr>
<th style="text-align : left" colspan="1" class="">Version</th>
<th style="text-align : left" colspan="1" class="">Warning</th>
</tr>
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
<td class="column1">6.3</td>
<td class="column2"><b>CAUTION</b> - Via connections to both hatched and solid signal layer polygons are now controlled by the polygon connect style rule. Re-pouring polygons may result in physical copper differences.</td>
</tr>
</table>
<br><hr>
<p>This file was generated by <b>an earlier</b> version of the software</p>
</body>
</html>
基于SEP4020 核心板+配套开发底板PROTEL DXP设计硬件（原理图+PCB）工程文件.zip
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基于SEP4020 核心板+配套开发底板PROTEL DXP设计硬件（原理图+PCB）工程文件.zip （28个子文件） 
UB4020MBT(V1.0) 
UB4020MBT(V1.0).Sch 918B UB4020MBT(V1.0).SchPreview 21KB P05 DIMM CPU Port.Sch 26KB UB4020MBT(V1.0).PCB 1.74MB P02 IIS AUDIO.SchPreview 57KB UB4020MBT(V1.0).PCB.htm 5KB P05 DIMM CPU Port.SchPreview 73KB P03 Interface and Extended Port.Sch 21KB Documents.PrjPcb 28KB P06 Power.Sch 14KB P02 IIS AUDIO.Sch 35KB P03 Interface and Extended Port.SchPreview 64KB P07 RMII Ethernet.Sch 26KB P08 USB HOST.SchPreview 75KB UB4020MBT(V1.0).PCBPreview 183KB P04 MMC OR SD.Sch 15KB P07 RMII Ethernet.SchPreview 74KB P04 MMC OR SD.SchPreview 38KB P01 GPIO LED and Touch Panel.Sch 19KB P01 GPIO LED and Touch Panel.SchPreview 44KB P08 USB HOST.Sch 22KB P06 Power.SchPreview 35KB UB4020MBK(V1.0) UB4020MBK(V1.0).schPreview 118KB UB4020MBK(V1.0).pcbPreview 118KB Documents.PrjPcb 26KB UB4020MBK(V1.0).sch 101KB UB4020MBK(V1.0).NET 8KB UB4020MBK(V1.0).pcb 582KB资源评论
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