TC358870各个工作模式驱动配置源代码.zip

#include "tc358870_cfg.h" #include "stm32_delay.h" #include "stdio.h" void tc358870_Startup(void) { u8 Sys_Status=0; // Initialization to receive HDMI signal // Software Reset stm32_I2C_Write_16bit(0x0004,0x0004); // ConfCtl0 stm32_I2C_Write_16bit(0x0002,0x3F01); // SysCtl stm32_I2C_Write_16bit(0x0002,0x0000); // SysCtl stm32_I2C_Write_16bit(0x0006,0x0008); // ConfCtl1 // DSI-TX0 Transition Timing stm32_I2C_Write_32bit(0x0108,0x00000001); // DSI_TX_CLKEN stm32_I2C_Write_32bit(0x010C,0x00000001); // DSI_TX_CLKSEL stm32_I2C_Write_32bit(0x02A0,0x00000001); // MIPI_PLL_CONTROL stm32_I2C_Write_32bit(0x02AC,0x000090BD); // MIPI_PLL_CNF Delay_ms(1); stm32_I2C_Write_32bit(0x02A0,0x00000003); // MIPI_PLL_CONTROL stm32_I2C_Write_32bit(0x0118,0x00000014); // LANE_ENABLE stm32_I2C_Write_32bit(0x0120,0x00001770); // LINE_INIT_COUNT stm32_I2C_Write_32bit(0x0124,0x00000000); // HSTX_TO_COUNT stm32_I2C_Write_32bit(0x0128,0x00000101); // FUNC_ENABLE stm32_I2C_Write_32bit(0x0130,0x00010000); // DSI_TATO_COUNT stm32_I2C_Write_32bit(0x0134,0x00005000); // DSI_PRESP_BTA_COUNT stm32_I2C_Write_32bit(0x0138,0x00010000); // DSI_PRESP_LPR_COUNT stm32_I2C_Write_32bit(0x013C,0x00010000); // DSI_PRESP_LPW_COUNT stm32_I2C_Write_32bit(0x0140,0x00010000); // DSI_PRESP_HSR_COUNT stm32_I2C_Write_32bit(0x0144,0x00010000); // DSI_PRESP_HSW_COUNT stm32_I2C_Write_32bit(0x0148,0x00001000); // DSI_PR_TO_COUNT stm32_I2C_Write_32bit(0x014C,0x00010000); // DSI_LRX-H_TO_COUNT stm32_I2C_Write_32bit(0x0150,0x00000160); // FUNC_MODE stm32_I2C_Write_32bit(0x0154,0x00000001); // DSI_RX_VC_ENABLE stm32_I2C_Write_32bit(0x0158,0x000000C8); // IND_TO_COUNT stm32_I2C_Write_32bit(0x0168,0x0000002A); // DSI_HSYNC_STOP_COUNT stm32_I2C_Write_32bit(0x0170,0x00000478); // APF_VDELAYCNT stm32_I2C_Write_32bit(0x017C,0x00000081); // DSI_TX_MODE stm32_I2C_Write_32bit(0x018C,0x00000001); // DSI_HSYNC_WIDTH stm32_I2C_Write_32bit(0x0190,0x00000104); // DSI_HBPR stm32_I2C_Write_32bit(0x01A4,0x00000000); // DSI_RX_STATE_INT_MASK stm32_I2C_Write_32bit(0x01C0,0x00000015); // DSI_LPRX_THRESH_COUNT stm32_I2C_Write_32bit(0x0214,0x00000000); // APP_SIDE_ERR_INT_MASK stm32_I2C_Write_32bit(0x021C,0x00000080); // DSI_RX_ERR_INT_MASK stm32_I2C_Write_32bit(0x0224,0x00000000); // DSI_LPTX_INT_MASK stm32_I2C_Write_32bit(0x0254,0x00000006); // LPTXTIMECNT stm32_I2C_Write_32bit(0x0258,0x00240204); // TCLK_HEADERCNT stm32_I2C_Write_32bit(0x025C,0x000D0008); // TCLK_TRAILCNT stm32_I2C_Write_32bit(0x0260,0x00140006); // THS_HEADERCNT stm32_I2C_Write_32bit(0x0264,0x00004268); // TWAKEUPCNT stm32_I2C_Write_32bit(0x0268,0x0000000F); // TCLK_POSTCNT stm32_I2C_Write_32bit(0x026C,0x000D0008); // THS_TRAILCNT stm32_I2C_Write_32bit(0x0270,0x00000020); // HSTXVREGCNT stm32_I2C_Write_32bit(0x0274,0x0000001F); // HSTXVREGEN stm32_I2C_Write_32bit(0x0278,0x00060005); // BTA_COUNT stm32_I2C_Write_32bit(0x027C,0x00000002); // DPHY_TX ADJUST stm32_I2C_Write_32bit(0x011C,0x00000001); // DSITX_START // DSI-TX1 Transition Timing stm32_I2C_Write_32bit(0x0308,0x00000001); // DSI_TX_CLKEN stm32_I2C_Write_32bit(0x030C,0x00000001); // DSI_TX_CLKSEL stm32_I2C_Write_32bit(0x04A0,0x00000001); // MIPI_PLL_CONTROL stm32_I2C_Write_32bit(0x04AC,0x000090BD); // MIPI_PLL_CNF Delay_ms(1); stm32_I2C_Write_32bit(0x04A0,0x00000003); // MIPI_PLL_CONTROL stm32_I2C_Write_32bit(0x0318,0x00000014); // LANE_ENABLE stm32_I2C_Write_32bit(0x0320,0x00001770); // LINE_INIT_COUNT stm32_I2C_Write_32bit(0x0324,0x00000000); // HSTX_TO_COUNT stm32_I2C_Write_32bit(0x0328,0x00000101); // FUNC_ENABLE stm32_I2C_Write_32bit(0x0330,0x00010000); // DSI_TATO_COUNT stm32_I2C_Write_32bit(0x0334,0x00005000); // DSI_PRESP_BTA_COUNT stm32_I2C_Write_32bit(0x0338,0x00010000); // DSI_PRESP_LPR_COUNT stm32_I2C_Write_32bit(0x033C,0x00010000); // DSI_PRESP_LPW_COUNT stm32_I2C_Write_32bit(0x0340,0x00010000); // DSI_PRESP_HSR_COUNT stm32_I2C_Write_32bit(0x0344,0x00010000); // DSI_PRESP_HSW_COUNT stm32_I2C_Write_32bit(0x0348,0x00001000); // DSI_PR_TO_COUNT stm32_I2C_Write_32bit(0x034C,0x00010000); // DSI_LRX-H_TO_COUNT stm32_I2C_Write_32bit(0x0350,0x00000160); // FUNC_MODE stm32_I2C_Write_32bit(0x0354,0x00000001); // DSI_RX_VC_ENABLE stm32_I2C_Write_32bit(0x0358,0x000000C8); // IND_TO_COUNT stm32_I2C_Write_32bit(0x0368,0x0000002A); // DSI_HSYNC_STOP_COUNT stm32_I2C_Write_32bit(0x0370,0x00000478); // APF_VDELAYCNT stm32_I2C_Write_32bit(0x037C,0x00000081); // DSI_TX_MODE stm32_I2C_Write_32bit(0x038C,0x00000001); // DSI_HSYNC_WIDTH stm32_I2C_Write_32bit(0x0390,0x00000104); // DSI_HBPR stm32_I2C_Write_32bit(0x03A4,0x00000000); // DSI_RX_STATE_INT_MASK stm32_I2C_Write_32bit(0x03C0,0x00000015); // DSI_LPRX_THRESH_COUNT stm32_I2C_Write_32bit(0x0414,0x00000000); // APP_SIDE_ERR_INT_MASK stm32_I2C_Write_32bit(0x041C,0x00000080); // DSI_RX_ERR_INT_MASK stm32_I2C_Write_32bit(0x0424,0x00000000); // DSI_LPTX_INT_MASK stm32_I2C_Write_32bit(0x0454,0x00000006); // LPTXTIMECNT stm32_I2C_Write_32bit(0x0458,0x00240204); // TCLK_HEADERCNT stm32_I2C_Write_32bit(0x045C,0x000D0008); // TCLK_TRAILCNT stm32_I2C_Write_32bit(0x0460,0x00140006); // THS_HEADERCNT stm32_I2C_Write_32bit(0x0464,0x00004268); // TWAKEUPCNT stm32_I2C_Write_32bit(0x0468,0x0000000F); // TCLK_POSTCNT stm32_I2C_Write_32bit(0x046C,0x000D0008); // THS_TRAILCNT stm32_I2C_Write_32bit(0x0470,0x00000020); // HSTXVREGCNT stm32_I2C_Write_32bit(0x0474,0x0000001F); // HSTXVREGEN stm32_I2C_Write_32bit(0x0478,0x00060005); // BTA_COUNT stm32_I2C_Write_32bit(0x047C,0x00000002); // DPHY_TX ADJUST stm32_I2C_Write_32bit(0x031C,0x00000001); // DSITX_START // Command Transmission Before Video Start stm32_I2C_Write_16bit(0x0500,0x0004); // CMD_SEL stm32_I2C_Write_32bit(0x0110,0x00000016); // MODE_CONFIG stm32_I2C_Write_32bit(0x0310,0x00000016); // MODE_CONFIG // LCD Initialization // Soft Reset stm32_I2C_Write_16bit(0x0504,0x0005); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0001); // DCSCMD_Q Delay_ms(5); // Set Pixel Format stm32_I2C_Write_16bit(0x0504,0x0015); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x773A); // DCSCMD_Q Delay_us(200); // Set Column Address stm32_I2C_Write_16bit(0x0504,0x8039); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0005); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x002A); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0400); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x00FF); // DCSCMD_Q Delay_us(200); // Set Page Address stm32_I2C_Write_16bit(0x0504,0x8039); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0005); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x002B); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0600); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x003F); // DCSCMD_Q Delay_us(200); // Set Tear On stm32_I2C_Write_16bit(0x0504,0x0015); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0035); // DCSCMD_Q Delay_us(200); // Set Tear Scanline stm32_I2C_Write_16bit(0x0504,0x8039); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0003); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0044); // DCSCMD_Q stm32_I2C_Write_16bit(0x0504,0x0000); // DCSCMD_Q Delay_us(200); // Write Display Brightness stm32_I2C_Write_16bit(0x0504,0x0015); // DCSCMD_Q stm32_I2C_Write_16