CCU7-PWM-EXAMPLE-TLE989X-BDRV-MEAS HV-MON-PWM

Application Note Please read the Important Notice and Warnings at the end of this document 1.0

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TLE9893_2QKW62S_CCU7_PWM_AppNote.pdf

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The aim of this guide is to present the scope, the implementation, the algorithm and a demonstration of the

TLE9893_2QKW62D_CCU7_PWM example code for the TLE989x Infineon Embedded Power ICs based on Arm®

Cortex® M3. This example code can be found in the Keil µVision Pack Installer.

The full functionalities and characteristics of the embedded power devices are described in the datasheets and

user’s manual. Please refer to these documents for more detailed information. Furthermore, a low level (line-

by-line) description of the code is not the aim of this document, although occasionally some codeblocks might

be reported if necessary to the comprehension.

not be regarded as a description or warranty of a certain functionality, condition or quality of the

referred devices or presented software example.

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1 Introduction

In the TLE9893_2QKW62S_CCU7_PWM example, three signals are modulated and output via the GPIO pins P1.2,

P1.0 and P0.9. Three respectively inverted signals are modulated and output via the GPIO pins P0.3, P1.1 and

P0.8. The timer T12 is configured with a period time of 50µs. The choosen operation mode is edge-aligned.

Table 1 shows the configured channels and their corresponding output pins. The channel 2 is only applicable

Figure 1 shows the configured CCU7 signals and their expected output flow for a 50µs time period.

Figure 1 Overview of all output signals from Config Wizard

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The channel 0 is configured with two compare values CC70A, for a duty cycle of 25%, and C70B, for a duty cycle

Figure 2 Capture of signal on pin P1.2 and its corresponding inverted signal on pin P0.3

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The channel 1 is configured with two compare values CC71A, for a duty cycle of 50%, and C71B, for a duty cycle

Figure 3 Capture of signal on pin P1.0 and its corresponding inverted signal on pin P1.1

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The channel 2 is configured with two compare values CC72A, for a duty cycle of 10%, and C72B, for a duty cycle

This signal is shown for the 64-pin devices only.

Figure 4 Capture of signal on pin P0.9 and its corresponding inverted signal on pin P0.8